Chenming Hu

发表

A charge-conserving non-quasistatic MOSFET model for SPICE transient analysis

H.-J. Park, Ping Keung Ko, Chenming Hu, 1988, Technical Digest., International Electron Devices Meeting.

Device and Technology Impact on Low Power Electronics

Chenming Hu, 1996 .

Low-Input-Harmonics Power Supplies.

Chenming Hu, 1982 .

Non-volatile memory device with true CMOS compatibility

P. Francis, Chenming Hu, L. Chang, 1999 .

Modeling of a MOSFET's parasitic resistance's narrow width and body bias effects for an IC simulator

Yuhua Cheng, Chenming Hu, Kai Chen, 1996 .

Optimizing quarter and sub-quarter micron CMOS circuit speed considering interconnect loading effects

Peng Fang, Chenming Hu, Kai Chen, 1997 .

Switch-induced error voltage on a switched capacitor

Chenming Hu, Bing J. Sheu, B. Sheu, 1984 .

Internal ESD transients in input protection circuits

Chenming Hu, Y. Fong, 1989 .

Residential time-of-use kilowatthour meter

Chenming Hu, Stephen J. Hrinya, 1986 .

Approaches and options for modeling sub-0.1 /spl mu/m CMOS devices

Jin He, Mansun Chan, Chenming Hu, 2002, Proceedings 2002 IEEE Hong Kong Electron Devices Meeting (Cat. No.02TH8616).

A relaxation time approach to model the non-quasi-static transient effects in MOSFETs

Mansun Chan, Ping Keung Ko, Chenming Hu, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

Simulation of MOSFET lifetime under AC hot-electron stress

Jeong Yeol Choi, Chenming Hu, K. Seki, 1988 .

Modeling off-state leakage current of DG-SOI MOSFETs for low-voltage design

Chenming Hu, Bing Yu, T. Tanaga, 1996, 1996 IEEE International SOI Conference Proceedings.

Modeling electromigration lifetime under pulsed and AC current stress

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1993, Other Conferences.

An Impact Ionization Model for SO1 Circuit Simulation

Ali M. Niknejad, Pin Su, Mansun Chan, 2002 .

Simulating the effects of single-event and radiation phenomena on GaAs MESFET integrated circuits

Chenming Hu, Peter George, P. K. Ko, 1989, 1989 Proceedings of the IEEE Custom Integrated Circuits Conference.

Interconnect scaling: signal integrity and performance in future high-speed CMOS designs

Dennis Sylvester, Chenming Hu, O. S. Nakagawa, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Hot-carrier-reliability design rules for translating device degradation to CMOS digital circuit degradation

Peng Fang, Chenming Hu, K. N. Quader, 1994 .

Quantitative analysis of SILCs (stress-induced leakage currents) based on the inelastic trap-assisted tunneling model

Donggun Park, Chenming Hu, Katsuhiko Kubota, 1999, Advanced Lithography.

Simulation Of Floating Body Effect In SOI Circuits Using BSIM3SOI

Chenming Hu, F. Assaderaghi, C. Wann, 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

Contact-pad design for high-frequency silicon measurements

Chenming Hu, Xiaodong Jin, D.F. Williams, 2000, IEEE 9th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.00TH8524).

Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI

Jeffrey Bokor, Ping-Keung Ko, Chenming Hu, 1997 .

MOSFET gate leakage modeling and selection guide for alternative gate dielectrics based on leakage considerations

Chenming Hu, Tsu-Jae King, Yee-Chia Yeo, 2003 .

High endurance ultra-thin tunnel oxide for dynamic memory application

Chenming Hu, C. Wann, 1995, Proceedings of International Electron Devices Meeting.

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

Yu Cao, Dennis Sylvester, Chenming Hu, 2002, 15th Annual IEEE International ASIC/SOC Conference.

CMOS RF modeling for GHz communication IC's

Paul R. Gray, Chenming Hu, Xiaodong Jin, 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

Model for photo-induced long-term drain current transients in GaAs MESFETs

Chenming Hu, Peter George, Ping K. Ko, 1990 .

Invited Paper SO1 and Device Scaling

Chenming Hu, 1998 .

Future CMOS scaling and reliability

Chenming Hu, C. Hu, 1993, Proc. IEEE.

Circuit reliability simulator-oxide breakdown module

Elyse Rosenbaum, Chenming Hu, P. M. Lee, 1989, International Technical Digest on Electron Devices Meeting.

Punchthrough diode as the transient voltage suppressor for low-voltage electronics

Ya-Chin King, Chenming Hu, Bin Yu, 1996 .

Modeling the impact of substrate depletion in FDSOI MOSFETs

Chenming Hu, Pragya Kushwaha, Yogesh Singh Chauhan, 2015 .

SUBMICRON DEVICE RELIABILITY RESEARCH

Chenming Hu, 1989 .

An Analytical Crosstalk Model with Application to ULSI Interconnect Scaling

Dennis Sylvester, Chenming Hu, O. Sam Nakagawa, 1998 .

Projecting CMOS circuit hot-carrier reliability from DC device lifetime

Chenming Hu, K. N. Quader, Ping-Keung Ko, 1993, Proceedings of IEEE International Electron Devices Meeting.

Dynamic Threshold-Voltage MOSFET

Chenming Hu, 1999 .

Simulation of P- and N-MOSFET hot-carrier degradation in CMOS circuits

Ping Keung Ko, Chenming Hu, P. M. Lee, 1991, 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers.

Modeling of small size MOSFETs with reverse short channel and narrow width effects for circuit simulation

Yuhua Cheng, Chenming Hu, Toshihiro Sugii, 1997 .

A resistive-gated IGFET tetrode

Chenming Hu, Richard S. Muller, 1971 .

AC effects in IC reliability

Chenming Hu, 1996 .

Simulating radiation reliability with BERT

Paolo Pavan, Ping Keung Ko, Chenming Hu, 1995 .

Sub-20 nm CMOS FinFET technologies

Chenming Hu, N. Lindert, Tsu-Jae King, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Performance and V/sub dd/ scaling in deep submicrometer CMOS

Chenming Hu, Kai Chen, 1998 .

BSIM3V3 MOSFET MODEL

Chenming Hu, Weidong Liu, 1998 .

On Integrating a Polycide-ONO-Poly Capacitor into a 0.8㎛ Digital Technology for Mixed-Signal ASICs

Chenming Hu, Calvin T. Gabriel, Subhash R. Nariani, 1993 .

A simple subcircuit extension of the BSIM3v3 model for CMOS RF design

Chenming Hu, Suet Fong Tin, K. Mayaram, 2000, IEEE Journal of Solid-State Circuits.

Simulations of CMOS circuit degradation due to hot-carrier effects

J. T. Yue, Ping Keung Ko, Chenming Hu, 1992, 30th Annual Proceedings Reliability Physics 1992.

Direct sampling methodology for statistical analysis of scaled CMOS technologies

Michael Orshansky, Chenming Hu, J. C. Chen, 1999 .

An accurate non-quasistatic MOSFET model for simulation of RF and high speed circuits

Yuhua Cheng, Chenming Hu, Xiaodong Jin, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

BSIM-CG: A compact model of cylindrical/surround gate MOSFET for circuit simulations

Ali M. Niknejad, Peter M. Lee, Chenming Hu, 2012 .

Second breakdown of vertical power MOSFET's

Chenming Hu, Min-Hwa Chi, 1982 .

Reliability Issues of MOS and Bipolar ICs (Invited Paper)

Chenming Hu, C. Hu, 1989 .

Design of FinFET SRAM Cells Using a Statistical Compact Model

Ali M. Niknejad, Chenming Hu, Chung-Hsun Lin, 2009, 2009 International Conference on Simulation of Semiconductor Processes and Devices.

Modeling the impact of back-end process variation on circuit performance

Dennis Sylvester, Chenming Hu, O. S. Nakagawa, 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).

Research in VLSI Reliability.

Chenming Hu, Nathan Cheung, 1986 .

A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation

Chenming Hu, F. Assaderaghi, Jeffrey Bokor, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

MOTIONS OF 2D BODIES AT SMALL FORWARD SPEED

Chenming Hu, R Eatock Taylor, 1990 .

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Jeffrey Bokor, Michael Orshansky, Jeffrey Bokor, 1997 .

A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

Elyse Rosenbaum, Ping Keung Ko, Chenming Hu, 1993 .

Retraction notice to "Normalized mutual integral difference operator: A novel experimental method for extracting threshold voltage of MOSFETs" [Microelectronics Journal 33 (2002) 667-670]

Jin He, Zhang Xing, Mansun Chan, 2010, Microelectron. J..

Frequency-independent equivalent-circuit model for on-chip spiral inductors

Yu Cao, Chenming Hu, Xuejue Huang, 2003 .

A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation

Mansun Chan, Yuhua Cheng, Jianhui Huang, 1997 .

Simulating total-dose radiation effects on circuit behavior

Paolo Pavan, Chenming Hu, Ping Keung Ko, 1994, Proceedings of 1994 IEEE International Reliability Physics Symposium.

BSIM3 MOSFET model accuracy for RF circuit simulation

Kartikeya Mayaram, Chenming Hu, Suet Fong Tin, 1998, Proceedings RAWCON 98. 1998 IEEE Radio and Wireless Conference (Cat. No.98EX194).

Device design for low power electronics with accurate deep submicrometer LDD-MOSFET models

Yuhua Cheng, Chenming Hu, Kai Chen, 1996, Proceedings of 1996 International Symposium on Low Power Electronics and Design.

A p-v-n diode model for CMOS latchup

Chenming Hu, H. P. Zappe, 1991 .

Noise modeling and characterization for 1.5-V 1.8-GHz SOI low-noise amplifier

Wei Jin, Chenming Hu, Weidong Liu, 2001 .

Nanoscale CMOS at low temperature: design, reliability, and scaling trend

Bin Yu, Qi Xiang, C. Riccobene, 2001, 2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517).

Circuit reliability simulator for interconnect, via, and contact electromigration

Peng Fang, Chenming Hu, Nathan W. Cheung, 1992 .

A compact IGFET charge model

Chenming Hu, Bing J. Sheu, D. Scharfetter, 1984 .

Accurate in situ measurement of peak noise and delay change induced by interconnect coupling

Yu Cao, Dennis Sylvester, Takashi Sato, 2001 .

Studies of Coulomb Blockade , Single-Trangister Dynamic Memory , and Oxide Trap Charge State Based on the Random Telegraph Noise Modeling

Kiyotaka Imai, Chenming Hu, Shiro Kamohara, 1997 .

Circuit performance variability decomposition

Costas J. Spanos, Michael Orshansky, Chenming Hu, 1999, 1999 4th International Workshop on Statistical Metrology (Cat. No.99TH8391).

BERT- Circuit Oxide Reliability Simulator (CORS)

Elyse Rosenbaum, Chenming Hu, Ping-Keung Ko, 1990 .

Hot carrier reliability considerations for low Vdd CMOS technology

Chenming Hu, Chun Jiang, D. Pramanik, 1995, Proceedings of 4th International Conference on Solid-State and IC Technology.

A complete radiation reliability software simulator

Paolo Pavan, Chenming Hu, E. R. Minami, 1994 .

Circuit-level simulation of TDDB failure in digital CMOS circuits

Elyse Rosenbaum, Ping-Keung Ko, Chenming Hu, 1995 .

Electromigration under time-varying current stress

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1998 .

A model of CMOS gate delay and projection of future trend

Chenming Hu, Kai Chen, 1996, 2nd International Conference on ASIC.

The operation of power MOSFET in reverse mode

Chenming Hu, Min-hwa Chi, 1983 .

Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages

Toshihiro Sugii, Chenming Hu, N. Lindert, 1999, IEEE J. Solid State Circuits.

Performance and Vdd scaling in deep submicrometer CMOS

Chenming Hu, C. Hu, Kai Chen, 1998, IEEE J. Solid State Circuits.

Reliability of thin SiO2

Chenming Hu, K. F. Schuegraf, C. Hu, 1994 .

Low power negative capacitance FETs for future quantum-well body technology

Chenming Hu, Chun Wing Yeung, S. Salahuddin, 2013, 2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Effect of substrate contact on ESD failure of advanced CMOS integrated circuits

Chenming Hu, C. Hu, Y. Loh, 1993 .

3D FinFET and other sub-22nm transistors

Chenming Hu, C. Hu, 2012, 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.

5nm-gate nanowire FinFET

Chenming Hu, Yee-Chia Yeo, Mong-Song Liang, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Evidence of hole direct tunneling through ultrathin gate oxide using P/sup +/ poly-SiGe gate

Chenming Hu, Tsu-Jae King, Wen-Chin Lee, 1999 .

Air spacer MOSFET technology for 20nm node and beyond

Chenming Hu, C. Hu, Jemin Park, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Analysis and modeling of capacitances in halo-implanted MOSFETs

Chenming Hu, Chetan Gupta, Harshit Agarwal, 2017, 2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM).

SOI thermal impedance extraction methodology and its significance for circuit simulation

Chenming Hu, Philip C. H. Chan, Weidong Liu, 2001 .

A versatile multi-gate MOSFET compact model: BSIM-MG

Ali M. Niknejad, Chenming Hu, Chung-Hsun Lin, 2007 .

Methodology of self-heating free parameter extraction and circuit simulation for SOI CMOS

Chenming Hu, Pin Su, Y. Komatsu, 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

Negative-Capacitance FinFET Inverter, Ring Oscillator, SRAM Cell, and Ft

Jia-Min Shieh, Chenming Hu, Wen-Cheng Chiu, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

Effect of oxide field on hot‐carrier‐induced degradation of metal‐oxide‐semiconductor field‐effect transistors

Ping-Keung Ko, Chenming Hu, J. Y. Choi, 1987 .

Gate length scaling and threshold voltage control of double-gate MOSFETs

Jeffrey Bokor, Chenming Hu, Leland Chang, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Response Speed of Negative Capacitance FinFETs

Zoran Krivokapic, Chenming Hu, Sayeef Salahuddin, 2018, 2018 IEEE Symposium on VLSI Technology.

45nm node planar-SOI technology with 0.296μm2 6T-SRAM cell

Chenming Hu, Mong-Song Liang, Fu-Liang Yang, 2004, VLSIT 2004.

Efficient gate oxide defect screen for VLSI reliability

Chenming Hu, W. Y. Chan, C. Hu, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

Characterization of contact and via failure under short duration high pulsed current stress

Kaustav Banerjee, A. Amerasekera, Chenming Hu, 1997, 1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual.

Ultra-thin silicon dioxide leakage current and scaling limit

Chenming Hu, K. F. Schuegraf, C. Hu, 1992, 1992 Symposium on VLSI Technology Digest of Technical Papers.

30 nm ultra-thin-body SOI MOSFET with selectively deposited Ge raised S/D

Jeffrey Bokor, Pushkar Ranade, Chenming Hu, 2000, 58th DRC. Device Research Conference. Conference Digest (Cat. No.00TH8526).

Electron-trap generation by recombination of electrons and holes in SiO2

Chenming Hu, Stephen E. Holland, C. Hu, 1987 .

Ultra‐large‐scale integration device scaling and reliability

Chenming Hu, C. Hu, 1994 .

Effective Charge Modification Between SiO2 and Silicon

Chenming Hu, S. Aronowitz, H. P. Zappe, 1989 .

Direct-tunneling gate leakage current in double-gate and ultrathin body MOSFETs

Chenming Hu, Yee-Chia Yeo, Leland Chang, 2002 .

Self-Aligned, Gate Last, FDSOI, Ferroelectric Gate Memory Device With 5.5-nm Hf0.8Zr0.2O2, High Endurance and Breakdown Recovery

Chenming Hu, Sayeef Salahuddin, Ava J. Tan, 2017, IEEE Electron Device Letters.

Unified FinFET compact model: Modelling Trapezoidal Triple-Gate FinFETs

Chenming Hu, Sriramkumar Venugopalan, Juan Pablo Duarte, 2013, 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

The effect of channel hot carrier stressing on gate oxide integrity in MOSFET

Chenming Hu, I-Ru Chen, J. Y. Choi, 1988 .

BSIM6: Symmetric Bulk MOSFET Model

Ali M. Niknejad, Chenming Hu, Yogesh Singh Chauhan, 2012 .

BSIM-IMG: A Turnkey compact model for fully depleted technologies

Chenming Hu, C. Hu, Y. Chauhan, 2012, 2012 IEEE International SOI Conference (SOI).

P-MOSFET gate current and device degradation

Ping Keung Ko, Chenming Hu, K. Seki, 1989, International Symposium on VLSI Technology, Systems and Applications,.

Copper Interconnect: Fabrication And Reliability

Chenming Hu, J.M.E. Harper, 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

Molybdenum Gate Electrode Technology For Deep Sub-Micron CMOS Generations

Pushkar Ranade, Chenming Hu, Yee-Chia Yeo, 2001 .

Effects of the Variation of Ferroelectric Properties on Negative Capacitance FET Characteristics

Asif Islam Khan, Chenming Hu, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

Impact of inter-metal-oxide deposition condition on NMOS and PMOS transistor hot carrier effect

Chenming Hu, C. Jiang, C. H. Chen, 1992, 30th Annual Proceedings Reliability Physics 1992.

0.2V adiabatic NC-FinFET with 0.6mA/µm ION and 0.1nA/µm IOFF

Asif Khan, Chenming Hu, Sayeef Salahuddin, 2015, 2015 73rd Annual Device Research Conference (DRC).

Direct tunneling leakage current and scalability of alternative gate dielectrics

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

MoS2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS2 availability

Jia-Min Shieh, Yu-Lun Chueh, Chenming Hu, 2016, 2016 IEEE Symposium on VLSI Technology.

FinFET With High- $\kappa $ Spacers for Improved Drive Current

Chenming Hu, Angada B. Sachid, C. Hu, 2016, IEEE Electron Device Letters.

A capacitorless double-gate DRAM cell design for high density applications

Chenming Hu, Tsu-Jae King, C. Kuo, 2002, Digest. International Electron Devices Meeting,.

Analysis and modeling of flicker noise in lateral asymmetric channel MOSFETs

Chenming Hu, Pragya Kushwaha, Yogesh Singh Chauhan, 2016 .

BSIM and IC Simulation

Chenming Hu, Weidong Liu, 2011 .

The effects of oxide stress waveform on MOSFET performance

Elyse Rosenbaum, Chenming Hu, Z. H. Liu, 1991, International Electron Devices Meeting 1991 [Technical Digest].

Modeling of nonlinear thermal resistance in FinFETs

Chenming Hu, Pragya Kushwaha, Yogesh Singh Chauhan, 2016 .

Chapter 3 - Hot-Carrier Effects

Chenming Hu, C. Hu, 1989 .

Velocity overshoot of electrons and holes in Si inversion layers

Jeffrey Bokor, Michael Orshansky, Chenming Hu, 1997 .

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Chenming Hu, Sayeef Salahuddin, Kai-Shin Li, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Compact models for real device effects in FinFETs: Quantum-mechanical confinement and double junctions in FinFETs

Ali M. Niknejad, Chenming Hu, Sriramkumar Venugopalan, 2012 .

Plasma charging damage on ultrathin gate oxides

Donggun Park, Chenming Hu, C. Hu, 1998 .

Plasma etching antenna effect on oxide-silicon interface reliability

Chenming Hu, Hyungcheol Shin, C. Hu, 1993 .

odeling and Characterization of Electro

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1996 .

A Compact Quantum-Mechanical Model for Double-Gate MOSFET

Chenming Hu, Chung-Hsun Lin, A.M. Niknejad, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

Comparison of electromigration reliability of tungsten and aluminum vias under DC and time-varying current stressing

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1992, 30th Annual Proceedings Reliability Physics 1992.

Tendency for full depletion due to gate tunneling current

Mansun Chan, Chenming Hu, Pin Su, 2002, 2002 IEEE International SOI Conference.

SOI and device scaling

Chenming Hu, 1998, 1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199).

Plasma etching charge-up damage to thin oxides

Chenming Hu, Hyungcheol Shin, Graham W. Hills, 1993 .

New CMOS devices and compact modeling

Chenming Hu, 2007, 2007 International Workshop on Physics of Semiconductor Devices.

Temperature acceleration of time-dependent dielectric breakdown

Chenming Hu, Jeong-Soo Lee, R. Moazzami, 1989 .

Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits

Mansun Chan, Bin Yu, Ping Keung Ko, 1995 .

Recovery of threshold voltage after hot-carrier stressing

Chenming Hu, T.-C. Ong, C. Hu, 1988 .

Losses of a nematic liquid-crystal optical waveguide*

Chenming Hu, John R. Whinnery, C. Hu, 1974 .

Body self bias in fully depleted and non-fully depleted SOI devices

Mansun Chan, Ping Keung Ko, Chenming Hu, 1994, Proceedings. IEEE International SOI Conference.

A MOSFET electron mobility model of wide temperature range (77 - 400 K) for IC simulation

Ping Keung Ko, Chenming Hu, C. Hu, 1997 .

Computer analysis on the collection of alpha-generated charge for reflecting and absorbing surface conditions around the collector

Andrew R. Neureuther, Chenming Hu, K. W. Terrill, 1984 .

Normalized mutual integral difference method to extract threshold voltage of MOSFETs

Ru Huang, Xing Zhang, Mansun Chan, 2002 .

Effects of self-heating on integrated circuit metallization lifetimes

Chenming Hu, Nathan W. Cheung, C. Hu, 1989, International Technical Digest on Electron Devices Meeting.

Quasi-planar NMOS FinFETs with sub-100 nm gate lengths

J. Bokor, Chenming Hu, Leland Chang, 2001, Device Research Conference. Conference Digest (Cat. No.01TH8561).

Suppressing Flash EEPROM Erase Leakage With Negative Gate Bias And LDD Erase Junction

Chenming Hu, P. K. Ko, S. A. Parke, 1993, Symposium 1993 on VLSI Technology.

Threshold voltage and C-V characteristics of SOI MOSFET's related to Si film thickness variation on SIMOX wafers

Chenming Hu, P. K. Ko, Jone-Fang Chen, 1992 .

Topographic measurement of electromigration-induced stress gradients in aluminum conductor lines

Chenming Hu, Ping-Chuan Wang, Ismail C. Noyan, 2000 .

Plasma Charging Damage On Ultra-thin Gate Oxides

Donggun Park, Chenming Hu, 1997, 2nd International Symposium on Plasma Process-Induced Damage.

Simulating process-induced gate oxide damage in circuits

Chenming Hu, Hyungcheol Shin, C. Hu, 1997 .

Patterning sub-30-nm MOSFET gate with i-line lithography

Chenming Hu, Tsu-Jae King, K. Asano, 2001 .

A 65nm node strained SOI technology with slim spacer

Chenming Hu, Tsai-Sheng Gau, Yee-Chia Yeo, 2003, IEEE International Electron Devices Meeting 2003.

A 128K flash EEPROM using double polysilicon technology

Chenming Hu, G. Smarandoiu, Chien-Sheng Su, 1987, 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

Ultra Thin Body Silicon-On-Insulator (UTB SOI) MOSFET with Metal Gate Work-function Engineering for sub-70 nm Technology Node

Pushkar Ranade, Chenming Hu, Tsu-Jae King, 2002 .

ESD reliability and protection schemes in SOI CMOS output buffers

Mansun Chan, Chenming Hu, P. K. Ko, 1995 .

Performance of thin separate absorption, charge, and multiplication avalanche photodiodes

Joe C. Campbell, Chenming Hu, H. Nie, 1998 .

Quasi-2D Compact Modeling for Double-Gate MOSFET

Jin He, Tsz Yin Man, Ali M. Niknejad, 2004 .

Endurance properties of ferroelectric PZT thin films

Chenming Hu, R. Moazzami, W. H. Shepherd, 1990, International Technical Digest on Electron Devices.

SOI MOSFET thermal conductance and its geometry dependence

Chenming Hu, C. Hu, H. Nakayama, 2000, 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).

Silicon dioxide breakdown lifetime enhancement under bipolar bias conditions

Elyse Rosenbaum, Chenming Hu, C. Hu, 1993 .

Electron trapping in very thin thermal silicon dioxides

Chenming Hu, Mong-Song Liang, C. Hu, 1981, 1981 International Electron Devices Meeting.

Sub-60nm Si tunnel field effect transistors with Ion >100 µA/µm

Chang Yong Kang, Hsing-Huang Tseng, Raj Jammy, 2010, 2010 Proceedings of the European Solid State Device Research Conference.

Projecting interconnect electromigration lifetime for arbitrary current waveforms

Chenming Hu, Nathan W. Cheung, C. Hu, 1990 .

Metal-dielectric band alignment and its implications for metal gate complementary metal-oxide-semiconductor technology

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

Device design considerations for ultra-thin body non-hysteretic negative capacitance FETs

Chenming Hu, Sayeef Salahuddin, Chun Wing Yeung, 2013, 2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S).

TOPICAL REVIEW: Thin gate oxide damage due to plasma processing

Chenming Hu, Hyungcheol Shin, C. Hu, 1996 .

80nm SOI CMOS parameter extraction for BSIMPD

Toshihiro Sugii, Chenming Hu, Pin Su, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Record-high 121/62 μA/μm on-currents 3D stacked epi-like Si FETs with and without metal back gate

Jia-Min Shieh, Kuei-Shu Chang-Liao, Ci-Ling Pan, 2013, 2013 IEEE International Electron Devices Meeting.

Flicker-Noise Impact on Scaling of Mixed-Signal CMOS With HfSiON

Chenming Hu, C. Hu, T. Liu, 2008, IEEE Transactions on Electron Devices.

Reduce IC power consumption by >10x with a green transistor?

Chenming Hu, 2009, 2009 Device Research Conference.

SOI and nanoscale MOSFETs

Chenming Hu, 2001, Device Research Conference. Conference Digest (Cat. No.01TH8561).

Denser and more stable FinFET SRAM using multiple fin heights

Chenming Hu, Angada B. Sachid, 2011, 2011 International Semiconductor Device Research Symposium (ISDRS).

Hot-carrier-induced degradation in ultra-thin-film fully-depleted SOI MOSFETs

Bin Yu, Chenming Hu, Zhi-Jian Ma, 1996 .

Channel doping engineering of MOSFET with adaptable threshold voltage using body effect for low voltage and low power applications

Jeffrey Bokor, Chenming Hu, K. Noda, 1995, 1995 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers.

Electromigration reliability of tungsten and aluminum vias and improvements under AC current stress

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1993 .

Effects of high current pulses on integrated circuit metallization reliability

Chenming Hu, Nathan W. Cheung, B. K. Liew, 1988, InterSociety Conference on Thermal Phenomena in the Fabrication and Operation of Electronic Components. I-THERM '88.

EFFECTS OF HIGH ELECTRIC FIELD TRANSIENTS ON THIN GATE OXIDE MOSFETs.

Chenming Hu, C. Hu, Y. Fong, 1987 .

Work Function Engineering of Molybdenum Gate Electrodes by Nitrogen Implantation

Pushkar Ranade, Chenming Hu, Hideki Takeuchi, 2001 .

FinFET-a quasi-planar double-gate MOSFET

J. Bokor, Chenming Hu, Xuejue Huang, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

Electromigration design rules for bidirectional current

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1996, Proceedings of International Reliability Physics Symposium.

Modeling 20-nm Germanium FinFET With the Industry Standard FinFET Model

Chenming Hu, Yogesh Singh Chauhan, Sourabh Khandelwal, 2014, IEEE Electron Device Letters.

16nm functional 0.039µm2 6T-SRAM cell with nano injection lithography, nanowire channel, and full TiN gate

Shyi-Long Shy, Chenming Hu, Chien-Chao Huang, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Transistor Characteristics with Ta O Gate Dielectric

Donggun Park, Chenming Hu, Tsu-Jae King, 1998 .

Sub-50nm FinFET : PMOS

Vivek Subramanian, Jeffrey Bokor, Chenming Hu, 1999 .

Electromigration interconnect lifetime under AC and pulse DC stress

Chenming Hu, Nathan W. Cheung, B. K. Liew, 1989 .

Enhanced performance in sub-100 nm CMOSFETs using strained epitaxial silicon-germanium

Supika Mashiro, Chenming Hu, Yee-Chia Yeo, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Effects of temperature and defects on breakdown lifetime of thin SiO/sub 2/ at very low voltages

Chenming Hu, K. F. Schuegraf, C. Hu, 1994, Proceedings of 1994 IEEE International Reliability Physics Symposium.

Dc electrical oxide thickness model for quantization of the inversion layer in MOSFETs

Ya-Chin King, Chenming Hu, Y. King, 1998 .

Bifacial CIGS (11% efficiency)/Si solar cells by Cd-free and sodium-free green process integrated with CIGS TFTs

Jia-Min Shieh, Chenming Hu, Yu-Ming Yeh, 2011, 2011 International Electron Devices Meeting.

(Invited) FinFET and UTB--How to Make Very Short Channel MOSFETs

Chenming Hu, 2013 .

Fabrication of metal–oxide–semiconductor devices with extreme ultraviolet lithography

Richard H. Stulen, Jeffrey Bokor, Donald M. Tennant, 1996 .

A 0.1-/spl mu/m delta-doped MOSFET fabricated with post-low-energy implanting selective epitaxy

Chenming Hu, K. Noda, T. Uchida, 1998 .

A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin

Chenming Hu, ChiaHua Ho, Yi-Ping Hsieh, 2013, 2013 Symposium on VLSI Technology.

New Mobility Model for Accurate Modeling of Transconductance in FDSOI MOSFETs

Josef Watts, Chenming Hu, Pragya Kushwaha, 2018, IEEE Transactions on Electron Devices.

Hot-carrier-induced degradation of metal-oxide-semiconductor field-effect transistors: Oxide charge versus interface traps

Jeong Yeol Choi, Ping Keung Ko, Chenming Hu, 1989 .

Effects of temperature and defects on breakdown lifetime of thin SiO/sub 2/ at very low voltages

Chenming Hu, K. F. Schuegraf, C. Hu, 1994 .

35nm CMOS FinFETs

Chenming Hu, Mong-Song Liang, Fu-Liang Yang, 2002 .

A measurement-based charge sheet capacitance model of short-channel MOSFET's for SPICE

Ping Keung Ko, Chenming Hu, Hong June Park, 1986, 1986 International Electron Devices Meeting.

Quantum yield of electron impact ionization in silicon

Robert W. Brodersen, Chenming Hu, C. Hu, 1985 .

Threshold Vacuum Switch (TVS) on 3D-stackable and 4F2 cross-point bipolar and unipolar resistive random access memory

Chenming Hu, Cho-Lun Hsu, Wen-Cheng Chiu, 2012, 2012 International Electron Devices Meeting.

Reliability of thin SiO2 at direct-tunneling voltages

Donggun Park, Chenming Hu, K. F. Schuegraf, 1994 .

Compact Modeling for New Transistor Structures

Ali M. Niknejad, Chenming Hu, Chung-Hsun Lin, 2007 .

Statistical modeling of silicon dioxide reliability

Chenming Hu, I-Ru Chen, Jack C. Lee, 1988 .

Drain Induced Barrier Lowering (DIBL) effect on the intrinsic capacitances of nano-scale MOSFETs

Ali M. Niknejad, Chenming Hu, Yogesh Singh Chauhan, 2011 .

Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era

Chenming Hu, Tsu-Jae King, C. Hu, 2002 .

The effects of low-angle off-axis substrate orientation on MOSFET performance and reliability

Ping-Keung Ko, Chenming Hu, Jone-Fang Chen, 1991 .

Optimum doping profile for minimum ohmic resistance and high-breakdown voltage

Chenming Hu, C. Hu, 1979 .

BSIM-CMG 110.0.0: Multi-gate MOSFET compact model: technical manual

Ali M. Niknejad, Chenming Hu, Chung-Hsun Lin, 2014 .

Ultra-thin body PMOSFETs with selectively deposited Ge source/drain

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Single crystal functional oxides on silicon

Asif Islam Khan, Chenming Hu, Long You, 2015, Nature Communications.

Optimum doping profile of power MOSFET epitaxial layer

Chenming Hu, C. Hu, Xingbi Chen, 1982 .

Reliability phenomena under AC stress

Chenming Hu, 1998 .

Moore's law lives on

Jeffrey Bokor, Chenming Hu, Leland Chang, 2003 .

Inversion-layer capacitance and mobility of very thin gate-Oxide MOSFET's

Ping-Keung Ko, Jeong Yeol Choi, Chenming Hu, 1986 .

Oscillations during inductive turn-off in rectifiers

D. O. Pederson, Chenming Hu, C. Hu, 1999 .

A 0 . 1m Delta-Doped MOSFET Fabricated with Post-Low-Energy Implanting Selective Epitaxy

Chenming Hu, Hidenobu Miyamoto, Toru Tatsumi, 1998 .

Polarity asymmetry of oxides grown on polycrystalline silicon

Chenming Hu, Jack C. Lee, C. Hu, 1988 .

RETRACTED: Normalized mutual integral difference operator: a novel experimental method for extracting threshold voltage of MOSFETs

Jin He, Xing Zhang, Mansun Chan, 2002 .

Electron trapping in oxide grown from polycrystalline silicon

Chenming Hu, T. Klein, D.Y. Joh, 1979, 1979 International Electron Devices Meeting.

BSIM5 MOSFET Model

Mansun Chan, Jin He, Chenming Hu, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling [CMOS technology]

Chenming Hu, Wen-Chin Lee, C. Hu, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

Electrical characteristics of ferroelectric PZT thin films for DRAM applications

Chenming Hu, R. Moazzami, C. Hu, 1992 .

Monitoring plasma-process induced damage in thin oxide

Chenming Hu, Hyungcheol Shin, C. Hu, 1993 .

Gate last MOSFET with air spacer and self-aligned contacts for dense memories

Chenming Hu, Jemin Park, 2009, 2009 International Symposium on VLSI Technology, Systems, and Applications.

Impact of time dependent dielectric breakdown and stress-induced leakage current on the reliability of high dielectric constant (Ba,Sr)TiO/sub 3/ thin-film capacitors for Gbit-scale DRAMs

Donggun Park, Chenming Hu, Shintaro Yamamichi, 1999 .

Reliability of thin SiO/sub 2/ at direct-tunneling voltages

Donggun Park, Chenming Hu, K. F. Schuegraf, 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

SOI (Silicon-on-insulator) for high speed ultra large scale integration

Chenming Hu, 1994 .

Threshold voltage shift by quantum confinement in ultra-thin body device

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001, Device Research Conference. Conference Digest (Cat. No.01TH8561).

Projecting the minimum acceptable oxide thickness for time-dependent dielectric breakdown

Chenming Hu, I-Ru Chen, Jeong-Soo Lee, 1988, Technical Digest., International Electron Devices Meeting.

Analysis and modeling of low frequency noise in presence of doping non-uniformity in MOSFETs

Chenming Hu, Chetan Gupta, Sourabh Khandelwal, 2016, 2016 3rd International Conference on Emerging Electronics (ICEE).

Correlation of electromigration lifetime distribution to failure mode in dual damascene Cu/SiLK interconnects

Chenming Hu, Eric G. Liniger, Lynne Gignac, 2003 .

Effect of Fluorine Incorporation on 1/f Noise of HfSiON FETs for Future Mixed-Signal CMOS

Chenming Hu, C. Hu, Y. Yasuda, 2006, 2006 International Electron Devices Meeting.

SOI MOSFET design for all-dimensional scaling with short channel, narrow width and ultra-thin films

Mansun Chan, Ping Keung Ko, Chenming Hu, 1995, Proceedings of International Electron Devices Meeting.

An accurate model of thin film SOI-MOSFET breakdown voltage

Ping-Keung Ko, Chenming Hu, P. Cheng, 1991, International Electron Devices Meeting 1991 [Technical Digest].

Substrate hole current and oxide breakdown

Chenming Hu, Stephen E. Holland, C. Hu, 1986 .

Self-heating enhanced impact ionization in SOI MOSFETs

Toshihiro Sugii, Chenming Hu, Pin Su, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance—Part II: Model Validation

Chenming Hu, Yogesh Singh Chauhan, Sayeef Salahuddin, 2016, IEEE Transactions on Electron Devices.

Gate-induced band-to-band tunneling leakage current in LDD MOSFETs

Chenming Hu, P. K. Ko, C. Hu, 1992, 1992 International Technical Digest on Electron Devices Meeting.

Modeling and characterization of electromigration failures under bidirectional current stress

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1996 .

Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001 .

Metal‐oxide‐semiconductor field‐effect‐transistor substrate current during Fowler–Nordheim tunneling stress and silicon dioxide reliability

Chenming Hu, K. F. Schuegraf, C. Hu, 1994 .

Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/

Ya-Chin King, Chenming Hu, Tsu-Jae King, 2001 .

A high speed SOI technology with 12 ps/18 ps gate delay operating at 5 V/1.5 V

Chenming Hu, S. Parke, F. Assaderaghi, 1992, 1992 International Technical Digest on Electron Devices Meeting.

Simulation and modeling for soft recovery of p-i-n rectifiers

Kartikeya Mayaram, D. O. Pederson, Chenming Hu, 1988, Technical Digest., International Electron Devices Meeting.

Accelerated testing of SiO/sub 2/ reliability

Elyse Rosenbaum, Chenming Hu, C. Hu, 1996 .

Compact models of negative-capacitance FinFETs: Lumped and distributed charge models

Chenming Hu, Sayeef Salahuddin, Sourabh Khandelwal, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

BSIM-IMG: Compact model for RF-SOI MOSFETs

Chenming Hu, Pragya Kushwaha, Sourabh Khandelwal, 2015, 2015 73rd Annual Device Research Conference (DRC).

Punchthrough transient voltage suppressor for EOS/ESD protection of low-voltage IC's

Ya-Chin King, Chenming Hu, Bin Yu, 1995, Electrical Overstress/Electrostatic Discharge Symposium Proceedings.

45nm Node Planar-SO1 Technology with 0.296pm2 6T-SUM Cell

Chenming Hu, Mong-Song Liang, Di-Hong Lee, 2004 .

A full-process damage detection method using small MOSFET and protection diode

Donggun Park, Chenming Hu, Scott Zheng, 1996 .

Low-voltage green transistor using ultra shallow junction and hetero-tunneling

Hsing-Huang Tseng, Chenming Hu, P. Majhi, 2008, Extended Abstracts - 2008 8th International Workshop on Junction Technology (IWJT '08).

An Advanced Surface-Potential-Plus MOSFET Model

Jin He, Ali M. Niknejad, Mansun Chan, 2003 .

Some issues of power MOSFETs

Chenming Hu, Min-hwa Chi, C. Hu, 1982, 1982 IEEE Power Electronics Specialists conference.

Gate engineering for deep-submicron CMOS transistors

Chenming Hu, Tsu-Jae King, Wen-Chin Lee, 1998 .

MOS capacitance measurements for high-leakage thin dielectrics

Chenming Hu, C. Hu, K. Yang, 1999 .

NCFET Design Considering Maximum Interface Electric Field

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2018, IEEE Electron Device Letters.

New insight into high-field mobility enhancement of nitrided-oxide N-MOSFET's based on noise measurement

Ping-Keung Ko, Chenming Hu, C. Hu, 1994 .

Negative Capacitance, n-Channel, Si FinFETs: Bi-directional Sub-60 mV/dec, Negative DIBL, Negative Differential Resistance and Improved Short Channel Effect

Hong Zhou, Chenming Hu, Sayeef Salahuddin, 2018, 2018 IEEE Symposium on VLSI Technology.

Modified resistive switching behavior of ZrO2 memory films based on the interface layer formed by using Ti top electrode

Chenming Hu, Chung-Yi Wu, Chih-Yang Lin, 2007 .

Gate-Induced Drain Leakage in Ldd and Fully-Overlapped Ldd Mosfets

Chenming Hu, P. K. Ko, S. A. Parke, 1991, 1991 Symposium on VLSI Technology.

Quasi-planar FinFETs with selectively grown germanium raised source/drain

Jeffrey Bokor, Chenming Hu, Leland Chang, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Negative Capacitance in Short-Channel FinFETs Externally Connected to an Epitaxial Ferroelectric Capacitor

Asif Islam Khan, Chenming Hu, Sayeef Salahuddin, 2016, IEEE Electron Device Letters.

Noise overshoot at drain current kink in SOI MOSFET

Ping-Keung Ko, Chenming Hu, C. G. Sodini, 1990, 1990 IEEE SOS/SOI Technology Conference. Proceedings.

Liquid-crystal waveguides for integrated optics

Chenming Hu, John R. Whinnery, C. Hu, 1977 .

A non-charge-sheet analytic theory for undoped symmetric double-gate MOSFETs from the exact solution of Poisson's equation using SPP approach

Jin He, Ali M. Niknejad, Mansun Chan, 2004 .

Comparison of short-channel effect and offstate leakage in symmetric vs. asymmetric double gate MOSFETs

Jeffrey Bokor, Chenming Hu, Peiqi Xuan, 2000, 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).

Hot-electron effects in MOSFETs

Chenming Hu, 1983, 1983 International Electron Devices Meeting.

Hot-carrier reliability design guidelines for CMOS logic circuits

Wei-Jen Huang, Chenming Hu, C. Hu, 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.

Silicon nanoelectronics for the 21st century

Chenming Hu, 1999 .

Hot-carrier reliability of bipolar transistors

Chenming Hu, D. Burnett, 1990, 28th Annual Proceedings on Reliability Physics Symposium.

Ultrathin body InAs tunneling field-effect transistors on Si substrates

Elena Plis, Sanjay Krishna, Chenming Hu, 2011 .

Ion-cut silicon-on-insulator fabrication with plasma immersion ion implantation

Chenming Hu, Nathan W. Cheung, Jing Min, 1997 .

Extremely scaled silicon nano-CMOS devices

Jeffrey Bokor, Shiying Xiong, Pushkar Ranade, 2003, Proc. IEEE.

Structure and Numerical Simulation of Field Effect Solar Cell

Masashi Kawasaki, Hideomi Koinuma, Chenming Hu, 1996 .

Dual-metal gate technology for deep-submicron CMOS transistors

Hongfa Luan, Dim-Lee Kwong, Pushkar Ranade, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

A versatile, SOI BiCMOS technology with complementary lateral BJT's

Chenming Hu, S. Parke, F. Assaderaghi, 1992, 1992 International Technical Digest on Electron Devices Meeting.

60 nm planarized ultra-thin body solid phase epitaxy MOSFETs

Jeffrey Bokor, Chenming Hu, Tsu-Jae King, 2000, 58th DRC. Device Research Conference. Conference Digest (Cat. No.00TH8526).

Simulating the competing effects of P- and N-MOSFET hot-carrier aging in CMOS circuits

Ping-Keung Ko, Chenming Hu, P. M. Lee, 1994 .

Toward 44% switching energy reduction for FinFETs with vacuum gate spacer

Chenming Hu, Fu-Liang Yang, Kehuey Wu, 2012 .

Impact of polysilicon depletion in thin oxide MOS technology

Chenming Hu, K. F. Schuegraf, C. Hu, 1993, 1993 International Symposium on VLSI Technology, Systems, and Applications Proceedings of Technical Papers.

AC Charge Centroid Model For Quantization Of Inversion Layer In N-MOSFET

Ya-Chin King, Chenming Hu, Wen-Chin Lee, 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

Thermal analysis of the fusion limits of metal interconnect under short duration current pulses

A. Amerasekera, Chenming Hu, C. Hu, 1996, 1996 International Integrated Reliability Workshop Final Report.

Reliability simulator for interconnect and intermetallic contact electromigration

Chenming Hu, Nathan W. Cheung, P. Fang, 1990, 28th Annual Proceedings on Reliability Physics Symposium.

Electrical breakdown in thin gate and tunneling oxides

Ih-Chin Chen, Chenming Hu, Stephen E. Holland, 1985 .

Negative capacitance enables FinFET and FDSOI scaling to 2 nm node

Vita Pi-Ho Hu, Chenming Hu, Angada B. Sachid, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

45nm node planar-SOI technology with 0.296 /spl mu/m/sup 2/ 6T-SRAM cell

Chenming Hu, Tsai-Sheng Gau, Jaw-Jung Shin, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Thin-body FinFET as scalable low voltage transistor

Chenming Hu, C. Hu, 2012, Proceedings of Technical Program of 2012 VLSI Technology, System and Application.

Oxide Breakdown Model For Very Low Voltages

Chenming Hu, K. F. Schuegraf, C. Hu, 1993, Symposium 1993 on VLSI Technology.

Engineering Negative Differential Resistance in NCFETs for Analog Applications

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2018, IEEE Transactions on Electron Devices.

Low-voltage hot-electron currents and degradation in deep-submicrometer MOSFETs

Ping Keung Ko, Chenming Hu, M.-C. Jeng, 1989 .

Effects of high-/spl kappa/ dielectrics on the workfunctions of metal and silicon gates

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Electromigration Challenges for Nanoscale Cu Wiring

Chenming Hu, C.-C. Yang, Paul S. McLaughlin, 2009 .

Internal passivation for suppression of device instabilities induced by backend processes

Chenming Hu, Subhash R. Nariani, D. Pramanik, 1992, 30th Annual Proceedings Reliability Physics 1992.

Two Silicon Nitride Technologies for Post

Hongfa Luan, Dim-Lee Kwong, Chenming Hu, 2001 .

Investigation of self-heating phenomenon in small geometry vias using scanning Joule expansion microscopy

Kaustav Banerjee, A. Amerasekera, Chenming Hu, 1999, 1999 IEEE International Reliability Physics Symposium Proceedings. 37th Annual (Cat. No.99CH36296).

Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel

Vivek Subramanian, Jeffrey Bokor, Chenming Hu, 2002 .

Silicon-on-Insulator for High Speed ULSI

Chenming Hu, 1993 .

A long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunneling oxide

Ya-Chin King, Chenming Hu, Tsu-Jae King, 1999 .

Spacer FinFET: nano-scale CMOS technology for the terabit era

Chenming Hu, Tsu-Jae King, C. Hu, 2001, 2001 International Semiconductor Device Research Symposium. Symposium Proceedings (Cat. No.01EX497).

Planarized Copper Interconnects by Selective Electroless Plating

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1992 .

Circuit performance of double-gate SOI CMOS

Ali M. Niknejad, Mansun Chan, Chenming Hu, 2003, International Semiconductor Device Research Symposium, 2003.

Thickness and other effects on oxide and interface damage by plasma processing

Chenming Hu, Hyungcheol Shin, K. Noguchi, 1993, 31st Annual Proceedings Reliability Physics 1993.

Hot-carrier degradation in bipolar transistors at 300 and 110 K-effect on BiCMOS inverter performance

Chenming Hu, J. D. Burnett, 1990 .

Electromigration characteristics of Al/W via contact under unidirectional and bidirectional current conditions

Jiang Tao, Chenming Hu, Nathan W. Cheung, 1991, 1991 Proceedings Eighth International IEEE VLSI Multilevel Interconnection Conference.

Effect Of Impurity On Cu Electromigration

Yongan Xu, Daniel C. Edelstein, Chenming Hu, 2010 .

Unified Compact Model Covering Drift-Diffusion to Ballistic Carrier Transport

Chenming Hu, Pragya Kushwaha, Sayeef Salahuddin, 2016, IEEE Electron Device Letters.

Compact models for sub-22nm MOSFETs

Ali M. Niknejad, Chenming Hu, Yogesh Singh Chauhan, 2011 .

An Extension Of BSIM3 Model Incorporating Velocity Overshoot

Jeffrey Bokor, Michael Orshansky, Chenming Hu, 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

Nonvolatile semiconductor memories : technologies, design, and applications

Chenming Hu, 1991 .

Hybrid Si/TMD 2D electronic double channels fabricated using solid CVD few-layer-MoS2 stacking for Vth matching and CMOS-compatible 3DFETs

Chenming Hu, Yi-Ju Chen, Lain-Jong Li, 2014, 2014 IEEE International Electron Devices Meeting.

BSIM-CMG: A Compact Model for Multi-Gate Transistors

Ali M. Niknejad, Chenming Hu, Mohan Dunga, 2008 .