Bharti Chimdyalwar

Over-approximating loops to prove properties using bounded model checking

Ravindra Metta, Priyanka Darke, Bharti Chimdyalwar, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

VeriAbs : Verification by Abstraction and Test Generation (Competition Contribution)

Supratik Chakraborty, Shrawan Kumar, Priyanka Darke, 2020, TACAS.

Effective false positive filtering for evolving software

Shrawan Kumar, Bharti Chimdyalwar, 2011, ISEC.

Eliminating Static Analysis False Positives Using Loop Abstraction and Bounded Model Checking

Priyanka Darke, Bharti Chimdyalwar, Avriti Chauhan, 2015, FM.

Survey of array out of bound access checkers for C code

Bharti Chimdyalwar, 2012, ISEC.

VeriAbs: Verification by Abstraction (Competition Contribution)

Shrawan Kumar, Priyanka Darke, Bharti Chimdyalwar, 2017, TACAS.

Precise range analysis on large industry code

Shrawan Kumar, Bharti Chimdyalwar, Ulka Shrotri, 2013, ESEC/FSE 2013.

Efficient Safety Proofs for Industry-Scale Code Using Abstractions and Bounded Model Checking

Priyanka Darke, Bharti Chimdyalwar, R. Venkatesh, 2017, 2017 IEEE International Conference on Software Testing, Verification and Validation (ICST).

Statically relating program properties for efficient verification (short WIP paper)

Priyanka Darke, Bharti Chimdyalwar, P. Darke, 2018, LCTES.

VeriAbs : Verification by Abstraction and Test Generation

Priyanka Darke, Bharti Chimdyalwar, Avriti Chauhan, 2019, 2019 34th IEEE/ACM International Conference on Automated Software Engineering (ASE).

VeriAbs: Verification by Abstraction and Test Generation - (Competition Contribution)

Shrawan Kumar, Raveendra Kumar Medicherla, Priyanka Darke, 2018, TACAS.

Selective path-sensitive interval analysis (WIP paper)

Bharti Chimdyalwar, Shrawan Kumar, 2021, LCTES.