Kartik Kalia

发表

I2C and HSTL IO Standard Based Low Power Thermal Aware Adder Design on 45nm FPGA

Kartik Kalia, Khyati Nanda, Arushi Aggarwal, 2015 .

Voltage Scaling Based Wireless LAN Specific UART Design Based on 90nm FPGA

Kartik Kalia, Rashmi Sharma, Lakshay Rohilla, 2016 .

Clock Gating Based Energy Efficient and Thermal Aware Design of Latin Unicode Reader for Natural Language Processing on FPGA

Kartik Kalia, Dil muhammed Akbar Hussain, Ritu Singh, 2016 .

Transistor Resizing Based Low Power Thermal Aware Adder Design on FPGA

Kartik Kalia, Khyati Nanda, Arushi Aggarwal, 2015 .

SSTL based thermal and power efficient RAM design on 28nm FPGA for spacecraft

Kartik Kalia, Bishwajeet Pandey, D. M. A. Hussain, 2016, 2016 International Conference on Smart Grid and Clean Energy Technologies (ICSGCE).

A Study of Today's A.I. through Chatbots and Rediscovery of Machine Intelligence

Teerath Das, Kartik Kalia, Anirudh Khanna, 2015 .

Studying the Open System Interconnection Model and Proposing the Concept of Layer Zero

Rishabh Mehta, Shubham Bansal, Kartik Kalia, 2016 .

I/O StandardsBased on Green Communication UsingFibonacci GeneratorDesign on FPGA

Saifur Rahman, Bishwajeet Pandey, Kartik Kalia, 2015 .

Efficient IP Traffic over Optical Network Based on Wavelength Translation Switching

Kartik Kalia, Vikas Jha, Dil muhammed Akbar Hussain, 2016, MUE 2016.

HSTL based low power thermal aware adder design on 65nm FPGA

Bishwajeet Pandey, Kartik Kalia, Khyati Nanda, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Design Goal Based Implementation of Energy Efficient Greek Unicode Reader for Natural Language Processing

Gaurav Verma, Himanshu Verma, Divya Sharma, 2016 .

Energy Efficient Clean and Green IT: Concepts and Approaches

Kartik Kalia, Dinesh Sharma, Deepa Singh Sisodiya, 2015 .

SSTL Input/Output Standard Based Energy Efficient Multiplier Design Using Urdhva Tiryagbhyam on 28nm FPGA

Kartik Kalia, Tania Islam, Tanesh Kumar, 2016 .

FPGA Based Low Power DES Algorithm Design And Implementation using HTML Technology

Tanesh Kumar, Bishwajeet Pandey, Teerath Das, 2016 .

GTL based wireless sensor specific energy efficient ALU design on 65nm FPGA

Bishwajeet Pandey, Kartik Kalia, Khyati Nanda, 2015, 2015 International Conference on Signal Processing, Computing and Control (ISPCC).

Thermal aware Internet of Things Enable Energy Efficient Encoder Design for Security on FPGA

Bishwajeet Pandey, Kanika Garg, Kartik Kalia, 2015 .

Energy Efficient Memory Design using Low Voltage Complementary Metal Oxide Semiconductor on 28nm FPGA

Amit Kumar, Kartik Kalia, Sweety, 2015 .

SSTL based Low Power Thermal Efficient WLAN Specific 32 bit ALU Design on 28 nm FPGA

Bishwajeet Pandey, Teerath Das, Kartik Kalia, 2016 .

Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA

Tanesh Kumar, Bishwajeet Pandey, Kartik Kalia, 2016 .