Akshita Goel

I2C and HSTL IO Standard Based Low Power Thermal Aware Adder Design on 45nm FPGA

Kartik Kalia, Khyati Nanda, Arushi Aggarwal, 2015 .

Transistor Resizing Based Low Power Thermal Aware Adder Design on FPGA

Kartik Kalia, Khyati Nanda, Arushi Aggarwal, 2015 .

Smart Garbage Monitoring System

Akshita Goel, Amita Goel, 2019 .