Shyh-Shyuan Sheu

发表

Highly Reliable Two-Step Charge-Pump Read Scheme for 1.5 F2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM

Heng-Yuan Lee, Lih-Yih Chiou, Tsai-Kan Chien, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A low store energy, low VDDmin, nonvolatile 8T2R SRAM with 3D stacked RRAM devices for low power mobile applications

Meng-Fan Chang, Frederick T. Chen, Che-Wei Wu, 2010, 2010 Symposium on VLSI Circuits.

Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Meng-Fan Chang, Heng-Yuan Lee, Frederick T. Chen, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

A low store energy and robust ReRAM-based flip-flop for normally off microprocessors

Ming-Jinn Tsai, Lih-Yih Chiou, Pei-Hua Wang, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Design optimization in write speed of multi-level cell application for phase change memory

Ming-Jinn Tsai, Shyh-Shyuan Sheu, Yi-Bo Liao, 2009, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC).

Low power design of phase-change memory based on a comprehensive model

Ming-Jinn Tsai, Y.-Y. Hsu, Shyh-Shyuan Sheu, 2010, IET Comput. Digit. Tech..

Training-based forming process for RRAM yield improvement

Cheng-Wen Wu, Ching-Yi Chen, Shyh-Shyuan Sheu, 2011, 29th VLSI Test Symposium.

Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches

Ming-Jinn Tsai, Lih-Yih Chiou, Pei-Hua Wang, 2017, 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

A nonvolatile look-up table using ReRAM for reconfigurable logic

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2014, 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Challenges at circuit designs for resistive-type Nonvolatile memory and nonvolatile logics in mobile and cloud applications

Meng-Fan Chang, Albert Lee, Shyh-Shyuan Sheu, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

An energy-efficient nonvolatile microprocessor considering software-hardware interaction for energy harvesting applications

Lih-Yih Chiou, Ming-Jinn Tsai, Tsai-Kan Chien, 2016, 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

High-K metal gate contact RRAM (CRRAM) in pure 28nm CMOS logic process

Ming-Jinn Tsai, Ya-Chin King, Shyh-Shyuan Sheu, 2012, 2012 International Electron Devices Meeting.

Three-dimensional 4F2 ReRAM cell with CMOS logic compatible process

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2010, 2010 International Electron Devices Meeting.

RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme

Frederick T. Chen, Cheng-Wen Wu, Ching-Yi Chen, 2015, IEEE Transactions on Computers.

17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time

Meng-Fan Chang, Tien-Fu Chen, Heng-Yuan Lee, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

NV-BNN: An Accurate Deep Convolutional Neural Network Based on Binary STT-MRAM for Adaptive AI Edge

Heng-Yuan Lee, Ming-Hung Wu, Chih-Cheng Chang, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Access Strategies for Resistive Random Access Memory (RRAM)

Heng-Yuan Lee, Pang-Shiu Chen, Frederick T. Chen, 2012 .

RRAM-based Spiking Nonvolatile Computing-In-Memory Processing Engine with Precision-Configurable In Situ Nonlinear Activation

Yiran Chen, Meng-Fan Chang, Wei-Hao Chen, 2019, 2019 Symposium on VLSI Technology.

Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications

Meng-Fan Chang, Shu-Meng Yang, Yu-Sheng Chen, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Challenges and Trends of Resistive Memory (Memristor) Based Circuits for 3D-IC Applications

Meng-Fan Chang, Shyh-Shyuan Sheu, M. J. Tsai, 2011 .

A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors

Meng-Fan Chang, Yen-Cheng Chiu, Wei-Chen Wei, 2019, 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Impact of resistance drift on multilevel PCM design

Ming-Jinn Tsai, Shyh-Shyuan Sheu, Yi-Bo Liao, 2010, 2010 IEEE International Conference on Integrated Circuit Design and Technology.

Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) Cell and read-disturb-free temperature-aware current-mode read scheme

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2013, 2013 Symposium on VLSI Circuits.

Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications

Ming-Jinn Tsai, Lih-Yih Chiou, Tsai-Kan Chien, 2016, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM)

Meng-Fan Chang, Shyh-Shyuan Sheu, Pi-Feng Chiu, 2011, 2011 9th IEEE International Conference on ASIC.

A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors

Meng-Fan Chang, Yen-Cheng Chiu, Wei-Chen Wei, 2020, IEEE Journal of Solid-State Circuits.

ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing

Meng-Fan Chang, Tien-Fu Chen, Frederick T. Chen, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

Meng-Fan Chang, Frederick T. Chen, Ming-Jinn Tsai, 2014, IEEE Journal of Solid-State Circuits.

A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms

Meng-Fan Chang, Chih-Sheng Lin, Shyh-Shyuan Sheu, 2013, IEEE Journal of Solid-State Circuits.

Stochastic STT-MRAM Spiking Neuron Circuit

Ming-Hung Wu, Paritosh Sahu, Jeng-Hua Wei, 2020, 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

A larger stacked layer number scalable TSV-based 3D-SRAM for high-performance universal-memory-capacity 3D-IC platforms

Meng-Fan Chang, Hiroyuki Yamauchi, Shyh-Shyuan Sheu, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Circuit Design Challenges in Computing-in-Memory for AI Edge Devices

Meng-Fan Chang, Heng-Yuan Lee, Huaqiang Wu, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Circuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC

Meng-Fan Chang, Shyh-Shyuan Sheu, Pi-Feng Chiu, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2013, IEEE Journal of Solid-State Circuits.

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Shih-Chieh Chang, Meng-Fan Chang, Shanshi Huang, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device

Meng-Fan Chang, Hiroyuki Yamauchi, Shyh-Shyuan Sheu, 2012, 17th Asia and South Pacific Design Automation Conference.

Ti/HfO2 Based RRAM Operation Voltage Scaling for Embedded Memory

Heng-Yuan Lee, Pang-Shiu Chen, Frederick T. Chen, 2013 .

RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications

Meng-Fan Chang, Albert Lee, Pei-Ling Tseng, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Resistance switching for RRAM applications

Heng-Yuan Lee, Yu-Sheng Chen, Pang-Shiu Chen, 2011, Science China Information Sciences.

A 16Mb dual-mode ReRAM macro with sub-14ns computing-in-memory and memory functions enabled by self-write termination scheme

Meng-Fan Chang, Yuan Xie, Heng-Yuan Lee, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

An Ultra Compact Millimeter-Wave VCO in 3-D IC Technology

Pei-Ling Tseng, Chih-Sheng Lin, Shyh-Shyuan Sheu, 2014, IEEE Microwave and Wireless Components Letters.

Challenges and Circuit Techniques for Energy-Efficient On-Chip Nonvolatile Memory Using Memristive Devices

Meng-Fan Chang, Albert Lee, Ya-Chin King, 2015, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Fast-Write Resistive RAM (RRAM) for Embedded Applications

Meng-Fan Chang, Heng-Yuan Lee, Yu-Sheng Chen, 2011, IEEE Design & Test of Computers.

Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture

Ming-Jinn Tsai, Lih-Yih Chiou, Pei-Hua Wang, 2016, 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

A 50 ns Verify Speed in Resistive Random Access Memory by Using a Write Resistance Tracking Circuit

Yu-Sheng Chen, Pang-Shiu Chen, Ming-Jinn Tsai, 2012, IEICE Trans. Electron..

A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme

Heng-Yuan Lee, Yu-Sheng Chen, Pang-Shiu Chen, 2009, 2009 Symposium on VLSI Circuits.

A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing

Meng-Fan Chang, Tien-Fu Chen, Shyh-Shyuan Sheu, 2017, IEEE Journal of Solid-State Circuits.

A 48 TOPS and 20943 TOPS/W 512kb Computation-in-SRAM Macro for Highly Reconfigurable Ternary CNN Acceleration

Tuo-Hung Hou, Tian-Sheuan Chang, Shyh-Shyuan Sheu, 2021, 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

Xin Si, Shyh-Shyuan Sheu, Ting-Wei Chang, 2022, IEEE Journal of Solid-State Circuits.

16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

A Wafer-Level Three-Dimensional Integration Scheme With Cu TSVs Based on Microbump/Adhesive Hybrid Bonding for Three-Dimensional Memory Application

Shyh-Shyuan Sheu, Kuan-Neng Chen, Yao-Jen Chang, 2012, IEEE Transactions on Device and Materials Reliability.

Size-Dependent Switching Properties of Spin-Orbit Torque MRAM With Manufacturing-Friendly 8-Inch Wafer-Level Uniformity

Tuo-Hung Hou, Shyh-Shyuan Sheu, Chih-I Wu, 2020, IEEE Journal of the Electron Devices Society.

Three-Dimensional $\hbox{4F}^{2}$ ReRAM With Vertical BJT Driver by CMOS Logic Compatible Process

Heng-Yuan Lee, Ming-Jinn Tsai, Ya-Chin King, 2011, IEEE Transactions on Electron Devices.

Resistance instabilities in a filament-based resistive memory

Heng-Yuan Lee, Pang-Shiu Chen, Ming-Jinn Tsai, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

Sub-nA Low-Current HZO Ferroelectric Tunnel Junction for High-Performance and Accurate Deep Learning Acceleration

Heng-Yuan Lee, Ming-Hung Wu, Chih-Cheng Chang, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).