W. Nebel

Binding, Allocation and Floorplanning in Low Power High-Level Synthesis

D. Helms, A. Stammermann, M. Schulte, 2003, ICCAD 2003.

Multi-Tool Constraint Verification

R. Bruck, A. Schafer, K. Hahn, 2007, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems.

JAVA VHDL-AMS, ADA Or C For System Level Specifications?

W. Nebel, E. Moser, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Evaluation of a refinement-driven systemC/spl trade/-based design flow

J. Gerlach, T. Schubert, W. Nebel, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

System-level power optimization

W. Nebel, 2004 .

Modeling communication with Objective VHDL

M. Radetzki, W. Nebel, W. Putzke-Roming, 1998, Proceedings International Verilog HDL Conference and VHDL International Users Forum.

OSSS methodology - system-level design and synthesis of embedded HW/SW systems in C++

F. Oppenheimer, W. Nebel, K. Gruttner, 2008, 2008 First International Symposium on Applied Sciences on Biomedical and Communication Technologies.

System-level power optimization

W. Nebel, W. Nebel, 2004, Euromicro Symposium on Digital System Design, 2004. DSD 2004..