O. Watanabe

A 2 GHz down-converter with a 3 dB bandwidth of 600 MHz using LO signal suppressing output buffer

T. Itakura, I. Hattori, O. Watanabe, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

A 380-MHz CMOS linear-in-dB signal-summing variable gain amplifier with gain compensation techniques for CDMA systems

T. Itakura, S. Otaka, O. Watanabe, 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).