H. Hara

A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling

T. Fujiyoshi, S. Shiratake, S. Nomura, 2006, IEEE Journal of Solid-State Circuits.

Special memory and embedded memory macros in MPEG environment

H. Hara, T. Shimazawa, G. Otomo, 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

Circuit techniques in realizing voltage-generator-less STT MRAM suitable for normally-off-type non-volatile L2 cache memory

K. Abe, S. Fujita, H. Hara, 2013, 2013 5th IEEE International Memory Workshop.

A 1-Mb 2-Tr/b nonvolatile CAM based on flash memory technologies

H. Hara, H. Yamada, T. Miwa, 1996 .

MTJ-based "normally-off processors" with thermal stability factor engineered perpendicular MTJ, L2 cache based on 2T-2MTJ cell, L3 and last level cache based on 1T-1MTJ cell and novel error handling scheme

H. Noguchi, K. Abe, S. Fujita, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Low power and high density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques

H. Noguchi, K. Abe, S. Fujita, 2014, 2014 IEEE International Electron Devices Meeting.

Enhanced fault ride through capability of matrix converter for wind power system

H. Hara, K. Inomata, K. Takeda, 2013, IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society.

50% active-power saving without speed degradation using standby power reduction (SPR) circuit

H. Hara, K. Seta, M. Kakumu, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

A 1 Mb 5-transistor/bit non-volatile CAM based on flash-memory technologies

H. Yamada, H. Hara, T. Miwa, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.