Vempati Srinivasa Rao

发表

Bed of nails - 100 microns pitch wafer level interconnections process

Vempati Srinivasa Rao, A.A.O. Tay, V. Kripesh, 2004, Proceedings of 6th Electronics Packaging Technology Conference (EPTC 2004) (IEEE Cat. No.04EX971).

Mechanism of Moldable Underfill (MUF) Process for RDL-1^st Fan-Out Panel Level Packaging (FOPLP)

Vempati Srinivasa Rao, Lin Bu, Xiaowu Zhang, 2019, 2019 IEEE 69th Electronic Components and Technology Conference (ECTC).

Development of High Density Fan Out Wafer Level Package (HD FOWLP) with Multi-layer Fine Pitch RDL for Mobile Applications

Vempati Srinivasa Rao, C. T. Chong, Chai Tai Chong, 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

Bed of nails: fine pitch wafer-level packaging interconnects for high performance nano devices

A.A.O. Tay, Vempati Srinivasa Rao, V. Kripesh, 2005, 2005 7th Electronic Packaging Technology Conference.

Process and Reliability of Large Fan-Out Wafer Level Package Based Package-on-Package

David Ho, Vempati Srinivasa Rao, C. T. Chong, 2017, 2017 IEEE 67th Electronic Components and Technology Conference (ECTC).

Characterization of DAF tape for embedded micro wafer level packaging

Aditya Kumar, Vempati Srinivasa Rao, Gaurav Sharma, 2009, 2009 11th Electronics Packaging Technology Conference.

Design, assembly and reliability of large die and fine-pitch Cu/low-k flip chip package

John H. Lau, Xiaowu Zhang, Vempati Srinivasa Rao, 2010, Microelectron. Reliab..

Challenges and optimization of 2nd bond process for reliable QFN packages

Vempati Srinivasa Rao, Eva Wai Leong Ching, Norhanani Binte Jaafar, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

IME's capabilities and programs in 2.5D/3DIC

Vempati Srinivasa Rao, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Drop impact reliability study of high density fan-out wafer level package

Zhaohui Chen, Vempati Srinivasa Rao, Tai Chong Chai, 2016, 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).

Development of Package-on-Package Using Embedded Wafer-Level Package Approach

Vempati Srinivasa Rao, David Ho Soon Wee, Ser Choongv Chong, 2013, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Process Development and Reliability of Microbumps

Vempati Srinivasa Rao, Vaidyanathan Kripesh, Andy Fenner, 2010, IEEE Transactions on Components and Packaging Technologies.

Through mold interconnects for fan-out wafer level package

Vempati Srinivasa Rao, Tai Chong Chai, Leong Ching Wai, 2016, 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).

Assembly and reliability of micro-bumped chips with Through-silicon Vias (TSV) interposer

Vempati Srinivasa Rao, Tai Chong Chai, Ming Chinq Jong, 2009, 2009 11th Electronics Packaging Technology Conference.

Integrated electronic and microfluidic packaging for CMOS biosensor chip

Vempati Srinivasa Rao, Mi Kyoung Park, Mian Zhi Ding, 2014, 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).

Study on silver sintered die attach material with different metal surfaces for high temperature and high pressure (300°c/30kpsi) applications

Vempati Srinivasa Rao, Leong Ching Wai, Mian Zhi Ding, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

Mitigation of warpage for large 2.5D Through Silicon Interposer (TSI) package assembly

Jong-Kai Lin, Vempati Srinivasa Rao, Mian Zhi Ding, 2015, 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).

Process integration of solder bumps and Cu pillar microbumps on 2.5D fine pitch TSV interposer

Vempati Srinivasa Rao, Sharon Lim Pei-Siang, Mian Zhi Ding, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

TSV interposer fabrication for 3D IC packaging

Vempati Srinivasa Rao, Li Hong Yu, C. T. Chong, 2009, 2009 11th Electronics Packaging Technology Conference.

Panel Warpage of Fan-Out Panel-Level Packaging Using RDL-First Technology

Vempati Srinivasa Rao, Fa Xing Che, Kazunori Yamamoto, 2020, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Modeling and characterization of the thermal performance of advanced packaging materials in the flip-chip BGA and QFN packages

Vempati Srinivasa Rao, Min Woo Daniel Rhee, Yen Yi Germaine Hoe, 2012, 2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).

A thick photoresist process for advanced wafer level packaging applications using JSR THB-151N negative tone UV photoresist

Vempati Srinivasa Rao, Seung Wook Yoon, Andrew A. O. Tay, 2006 .

Development of bonding process for high density fine pitch micro bump interconnections with wafer level underfill for 3D applications

Vempati Srinivasa Rao, Chen Zhaohui, Ser Choong Chong, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).