K. Sridharan

发表

Hardware design for efficient construction of an environment map for mobile robot navigation

K. Sridharan, T. K. Priya, 2003, TENCON 2003. Conference on Convergent Technologies for Asia-Pacific Region.

Design of a Multiplier in QCA

K. Sridharan, Vikramkumar Pudi, K. Sridharan, 2015 .

An efficient algorithm to construct reduced visibility graph and its FPGA implementation

K. Sridharan, T. K. Priya, K. Sridharan, 2004, 17th International Conference on VLSI Design. Proceedings..

Robotic Exploration and Landmark Determination: Hardware-Efficient Algorithms and FPGA Implementations

K. Sridharan, Panakala Rajesh Kumar, 2008, Studies in Computational Intelligence.

Very large-scale integration architecture for video stabilisation and implementation on a field programmable gate array-based autonomous vehicle

K. Sridharan, Vikramkumar Pudi, Tahiyah Nou Shene, 2015, IET Comput. Vis..

Efficient design of Baugh-Wooley multiplier in Quantum-Dot Cellular Automata

K. Sridharan, Vikramkumar Pudi, K. Sridharan, 2013, 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013).

A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects

K. Sridharan, T. K. Priya, 2006, Microprocess. Microsystems.

A course on web languages and web-based applications

K. Sridharan, 2004, IEEE Transactions on Education.

VLSI-efficient schemes for high-speed construction of tangent graph

K. Sridharan, Thambipillai Srikanthan, Siew Kei Lam, 2005, Robotics Auton. Syst..

A high-speed VLSI design and ASIC implementation for constructing Euclidean distance-based discrete Voronoi diagram

K. Sridharan, N. Sudha, 2004, IEEE Transactions on Robotics and Automation.

Fuzzy distance functions for motion planning

K. Sridharan, Harry E. Stephanou, 1992, Proceedings Fourth International Conference on Tools with Artificial Intelligence TAI '92.

Field Programmable Gate Array-based Robotic Exploration of an Indoor Environment

K. Sridharan, P.R. Kumar, 2006, 2006 1ST IEEE Conference on Industrial Electronics and Applications.

Design of Basic Digital Circuits in QCA

K. Sridharan, Vikramkumar Pudi, 2015 .

VLSI-Efficient Scheme and FPGA Realization for Robotic Mapping in a Dynamic Environment

K. Sridharan, P. Rajesh Kumar, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation

K. Sridharan, Yashrajsinh Parmar, 2018, IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society.

A novel CAM-based robotic indoor exploration algorithm and its area-efficient implementation

K. Sridharan, L. Vachhani, P.R. Kumar, 2008, 2008 34th Annual Conference of IEEE Industrial Electronics.

A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum-Dot Cellular Automata

K. Sridharan, Vikramkumar Pudi, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Hardware-efficient path planning for a mobile robot and FPGA realization

K. Sridharan, V. Sudharsan, 2012, 2012 IEEE 7th International Conference on Industrial and Information Systems (ICIIS).

Memory Optimizations in the Intel Reference Compiler

K. Sridharan, Utpal Banerjee, Pohua P. Chang, 1996, LCPC.

Robotic mapping with simple sensing and processing hardware — Algorithm and architecture

K. Sridharan, Leena Vachhani, 2010, 2010 11th International Conference on Control Automation Robotics & Vision.

Rendezvous of heterogeneous robots amidst obstacles with limited communication

K. Sridharan, Bhaskar Vundurthy, Aniketh More, 2016, 2016 Indian Control Conference (ICC).

An Environment for Parallel Structuring for Fortran Programs

K. Sridharan, James C. Browne, M. Ellis, 1989, ICPP.

Computation of penetration measures for convex polygons and polyhedra for graphics applications

K. Sridharan, 1998, Proceedings. Fifth International Conference on High Performance Computing (Cat. No. 98EX238).

Sentiment classification using harmony random forest and harmony gradient boosting machine

K. Sridharan, G. Komarasamy, K. Sridharan, 2019, Soft Computing.

Hardware-Directed Feature Detection for Video Stitching in Intelligent Transportation

K. Sridharan, Yashrajsinh Parmar, P. Sree Kalyan, 2015, 2015 International Conference on Advanced Computing and Communications (ADCOM).

Distance Measures on Intersecting Objects and Their Applications

K. Sridharan, S. Sathiya Keerthi, Harry E. Stephanou, 1994, Inf. Process. Lett..

Trust based Automatic Query formulation Search on Expert and Knowledge Users Systems

K. Sridharan, M. Chitra, 2014, J. Comput. Sci..

Design of a Hybrid Adder in QCA

K. Sridharan, Vikramkumar Pudi, 2015 .

A systematic review on techniques of feature selection and classification for text mining

K. Sridharan, P. Sivakumar, K. Sridharan, 2018, Int. J. Bus. Inf. Syst..

Efficient QCA design of single-bit and multi-bit subtractors

K. Sridharan, Vikramkumar Pudi, 2013, 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013).

Efficient computation of a measure of depth between convex objects for graphics applications

K. Sridharan, 2002, Comput. Graph..

Efficient Design of a Hybrid Adder in Quantum-Dot Cellular Automata

Vikram Pudi, K. Sridharan, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Carbon nanotube FET-based low-delay and low-power multi-digit adder designs

K. Sridharan, Bodapati Srinivasu, K. Sridharan, 2017, IET Circuits Devices Syst..

50 Years of CORDIC: Algorithms, Architectures, and Applications

K. Sridharan, Koushik Maharatna, Javier Valls-Coquillat, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

Efficient Multiternary Digit Adder Design in CNTFET Technology

K. Sridharan, S. Gurindagunta, V. Pudi, 2013, IEEE Transactions on Nanotechnology.

Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity

K. Sridharan, Fabrizio Lombardi, Vikramkumar Pudi, 2017, IEEE Transactions on Computers.

A parallel algorithm for constructing reduced visibility graph and its FPGA implementation

K. Sridharan, T. K. Priya, 2004, J. Syst. Archit..

Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation

K. Sridharan, Pramod Kumar Meher, Leena Vachhani, 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.

Low Complexity Design of Ripple Carry and Brent–Kung Adders in QCA

K. Sridharan, Vikramkumar Pudi, K. Sridharan, 2012, IEEE Transactions on Nanotechnology.

A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton

K. Sridharan, P. Rajesh Kumar, T. K. Priya, 2006, Microprocess. Microsystems.

CORDIC-Based Azimuth Calculation and Obstacle Tracing via Optimal Sensor Placement on a Mobile Robot

K. Sridharan, Pranjal Vyas, Vikramkumar Pudi, 2016, IEEE/ASME Transactions on Mechatronics.

Parallel Structuring of Programs Containing I/O Statements

K. Sridharan, Ravi Narayanaswamy, Carole Denton, 1990, ICPP.

The design and development of a web-based data acquisition system

K. Sridharan, K. Srinivasan, B. Rajesh Kumar, 2002, IEEE Trans. Instrum. Meas..

Design of Arithmetic Circuits in Quantum Dot Cellular Automata Nanotechnology

Vikram Pudi, K. Sridharan, 2015, Studies in Computational Intelligence.

Parallel structuring of real-time simulation programs

K. Sridharan, James C. Browne, Carole Denton, 1990, Digest of Papers Compcon Spring '90. Thirty-Fifth IEEE Computer Society International Conference on Intellectual Leverage.

A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies

K. Sridharan, B. Srinivasu, K. Sridharan, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Hardware-Efficient Prediction-Correction-Based Generalized-Voronoi-Diagram Construction and FPGA Implementation

K. Sridharan, Leena Vachhani, 2008, IEEE Transactions on Industrial Electronics.

An efficient algorithm for topological map construction in a planar environment explored using proximity sensors

K. Sridharan, S. Srinivasan, P. Rajesh Kumar, 2005, Proceedings of 2005 International Conference on Intelligent Sensing and Information Processing, 2005..

Low-Complexity Multiternary Digit Multiplier Design in CNTFET Technology

K. Sridharan, Bodapati Srinivasu, K. Sridharan, 2016, IEEE Transactions on Circuits and Systems II: Express Briefs.

Fuzzy distances for proximity characterization under uncertainty

K. Sridharan, Harry E. Stephanou, 1999, Fuzzy Sets Syst..

Multiagent Gathering With Collision Avoidance and a Minimax Distance Criterion—Efficient Algorithms and Hardware Realization

K. Sridharan, Bhaskar Vundurthy, 2019, IEEE Transactions on Industrial Informatics.

Interval Analysis Technique for Versatile and Parallel Multi-Agent Collision Detection and Avoidance

K. Sridharan, Pranjal Vyas, Leena Vachhani, 2020, J. Intell. Robotic Syst..

The design of a hardware accelerator for real-time complete visibility graph construction and efficient FPGA implementation

K. Sridharan, T. K. Priya, 2005, IEEE Transactions on Industrial Electronics.

Architecturally-efficient computation of shortest paths for a mobile robot

K. Sridharan, T. K. Priya, P. Rajesh Kumar, 2009 .

Teaching computer graphics and robotics using symbolic computation software

K. Sridharan, 2000, Comput. Appl. Eng. Educ..

Rendezvous of Heterogeneous Robots in Minimum Time - Theory and Experiments

K. Sridharan, Bhaskar Vundurthy, Onkar Kulkarni, 2019, AIR 2019.

A parallel algorithm to construct Voronoi diagram and its VLSI architecture

K. Sridharan, N. Sudha, S. Nandi, 1999, Proceedings 1999 IEEE International Conference on Robotics and Automation (Cat. No.99CH36288C).

Efficient FPGA Realization of CORDIC With Application to Robotic Exploration

K. Sridharan, Pramod Kumar Meher, Leena Vachhani, 2009, IEEE Transactions on Industrial Electronics.

Design of Ripple Carry and Prefix Adders in QCA

K. Sridharan, Vikramkumar Pudi, 2015 .

Computing two penetration measures for curved 2D objects

K. Sridharan, 1999, Inf. Process. Lett..

Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot

K. Sridharan, N. Sudha, Tahiyah Nou Shene, 2016, IEEE Transactions on Industrial Electronics.

Mobile Robot Navigation Through a Hardware-Efficient Implementation for Control-Law-Based Construction of Generalized Voronoi Diagram

K. Sridharan, L. Vachhani, A. D. Mahindrakar, 2011, IEEE/ASME Transactions on Mechatronics.

Efficient VLSI Architectures for the Hadamard Transform Based on Offset-Binary Coding and ROM Decomposition

Vikram Pudi, K. Sridharan, B. Sandeep Kumar, 2011, 2011 IEEE Computer Society Annual Symposium on VLSI.

On computing a distance measure for path planning

K. Sridharan, S. Sathiya Keerthi, Harry E. Stephanou, 1993, [1993] Proceedings IEEE International Conference on Robotics and Automation.

Time Optimal Rendezvous for Multi-Agent Systems Amidst Obstacles - Theory and Experiments

K. Sridharan, Bhaskar Vundurthy, 2018, IECON 2018 - 44th Annual Conference of the IEEE Industrial Electronics Society.

A hardware-architecture for control-law based voronoi diagram computation and FPGA implementation

K. Sridharan, L. Vachhani, A.D. Mahindrakar, 2008, TENCON 2008 - 2008 IEEE Region 10 Conference.

A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment

K. Sridharan, P. Rajesh Kumar, S. Srinivasan, 2006, Parallel Comput..

A pipelined architecture for motion tracking on a multicore environment

K. Sridharan, N. Sudha, Dan Wilkinson, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Algorithms for rapid computation of some distance functions between objects for path planning

K. Sridharan, Harry E. Stephanou, 1994, Proceedings of the 1994 IEEE International Conference on Robotics and Automation.

Hardware architecture for finding shortest paths

K. Sridharan, T. K. Priya, P. Rajesh Kumar, 2009, TENCON 2009 - 2009 IEEE Region 10 Conference.

Computation of a penetration measure between 3D convex polyhedral objects for collision detection

K. Sridharan, S. Sathiya Keerthi, S. Keerthi, 2001, J. Field Robotics.

A Hardware Accelerator and FPGA Realization for Reduced Visibility Graph Construction Using Efficient Bit Representations

K. Sridharan, T. K. Priya, 2007, IEEE Transactions on Industrial Electronics.

Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction

K. Sridharan, Thambipillai Srikanthan, Siew Kei Lam, 2004, IEEE Transactions on Industrial Electronics.

Efficient computation of Euclidean distance transform for applications in image processing

K. Sridharan, N. Sudha, Sukumar Nandi, 1998, Proceedings of IEEE TENCON '98. IEEE Region 10 International Conference on Global Connectivity in Energy, Computer, Communication and Control (Cat. No.98CH36229).

Cellular architecture for euclidean distance transformation

K. Sridharan, N. Sudha, Sukumar Nandi, 2000 .

Reliability analysis of full adder in Schottky Barrier Carbon Nanotube FET technology

K. Sridharan, B. Srinivasu, K. Sridharan, 2014, 14th IEEE International Conference on Nanotechnology.