Kostas Doris

发表

A dynamic latched comparator for low supply voltages down to 0.45 V in 65-nm CMOS

Yu Lin, Arthur H. M. van Roermund, Hans Hegt, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting

Boris Murmann, Martin Kramer, Kostas Doris, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

EE4: Figures-of-merit on trial

Stefano Stanzione, Paul Ferguson, Kostas Doris, 2018, ISSCC.

A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS

Boris Murmann, Martin Kramer, Kostas Doris, 2015, IEEE Journal of Solid-State Circuits.

Session 22 overview: Gigahertz data converters: Data converter subcommittee

Un-Ku Moon, Kostas Doris, Jan Westra, 2018, ISSCC.

Interleaving of successive-approximation register ADCs in deep sub-micron CMOS technology

A. Zanikopoulos, Kostas Doris, Ejg Erwin Janssen, 2013 .

An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS

Yu Lin, Kostas Doris, Erwin Janssen, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS Editor-in-Chief

Mattia Frasca, Maurizio Porfiri, Fernando Corinto, 2006 .

A 14 bit 200 MS/s DAC With SFDR >78 dBc, IM3 < -83 dBc and NSD <-163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping

Robert H. M. van Veldhoven, Arthur H. M. van Roermund, Yongjian Tang, 2011, IEEE Journal of Solid-State Circuits.

F6: Pushing the performance limit in data converters organizers: Venkatesh Srinivasan, Texas Instruments, Dallas, TX

David Stuart Robertson, U Seng-Pan, Kostas Doris, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals

Hans Hegt, Kostas Doris, Arthur van Roermund, 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).

Session 27 overview: Hybrid and nyquist data converters

Kostas Doris, Stephane Le Tual, 2016, ISSCC.

A novel analysis of the beam squinting in wideband phased array digital I/Q transmitters

Georgi Radulov, Kostas Doris, Veselin Manev, 2020, 2020 European Conference on Circuit Theory and Design (ECCTD).

A 14b 200MS/s DAC with SFDR>78dBc, IM3<−83dBc and NSD<−163dBm/Hz across the whole Nyquist band enabled by dynamic-mismatch mapping

Yongjian Tang, Hans Hegt, J. Briaire, 2010, 2010 Symposium on VLSI Circuits.

GS/s AD conversion for broadband multi-stream reception

A. Zanikopoulos, Claudio Nani, Kostas Doris, 2013 .

15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS

Boris Murmann, Martin Kramer, Kostas Doris, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS

Claudio Nani, Kostas Doris, Erwin Janssen, 2011, IEEE Journal of Solid-State Circuits.

A power-optimized high-speed and hig-resolution pipeline ADC with a parallel sampling first stage for broadband multi-carrier systems

Kostas Doris, Ahm Arthur van Roermund, A. Zanikopoulos, 2014 .

A broadband RF 65 nm CMOS front-end for cable TV reception

Mattia Borgarino, Kostas Doris, Lorenzo Tripodi, 2008, Microelectron. J..

Implementations of the Parallel-Sampling ADC Architecture

Arthur van Roermund, Hans Hegt, Kostas Doris, 2015 .

EE5: Lessons learned - Great circuits that didn't work - (Oops, if only i had known!)

Vivek De, Phillip Restle, Paul Ferguson, 2018, ISSCC.

Parallel-Sampling ADC Architecture for Multi-carrier Signals

Arthur van Roermund, Hans Hegt, Kostas Doris, 2015 .

An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals

Yu Lin, Arthur H. M. van Roermund, Hans Hegt, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Hybrid Data Converters

Kostas Doris, 2018 .

F2: Data-converter calibration and dynamic-matching techniques

Alyosha C. Molnar, Xicheng Jiang, Kostas Doris, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

High-speed Digital to Analog Converter issues with applications to Sigma Delta Modulators

Kostas Doris, Ahm Arthur van Roermund, Dmw Domine Leenaerts, 2002 .

Optimizing analog-to-digital converters based on the statistical properties of signal

A.H.M. van Roermund, J. A. Hegt, Kostas Doris, 2009 .

Automatic layout generation of high performance digital to analog converters

A.H.M. van Roermund, Kostas Doris, C. Lin, 2000 .

An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals

Yu Lin, Arthur H. M. van Roermund, Hans Hegt, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Power-Efficient High-Speed Parallel-Sampling ADCs for Broadband Multi-carrier Systems

A.H.M. van Roermund, J. A. Hegt, Kostas Doris, 2015 .

Enhancing ADC Performance by Exploiting Signal Properties

Arthur van Roermund, Hans Hegt, Kostas Doris, 2015 .

Time Non Linearities in D/A Converters

A.H.M. van Roermund, Kostas Doris, Domine M. W. Leenaerts, 2001 .

Synchronization distortion and spatio-temporal switching in current steering D/A converters

A.H.M. van Roermund, Kostas Doris, C. Lin, 2000 .

An input signal statistics aware design approach and examples for analog-to-digital converters for communication systems

Arthur van Roermund, Hans Hegt, Kostas Doris, 2011 .

A Novel 2-Dimensional Correction Method for mm-Wave Cartesian I/Q Modulators

Georgi I. Radulov, Kostas Doris, M. Lont, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

International Solid-State Circuits Conference 2005

Kathleen Philips, Eugenio Cantatore, Domine Leenaerts, 2005 .

D/A linearization for high speed Sigma Delta modulation

Kostas Doris, A.H.M. van Roermund, 2002 .