H. Volders

Advanced full-automatic inspection of copper interconnects

Toru Ishimoto, S. Takada, Zsolt Tokei, 2012, Advanced Lithography.

High yield sub-0.1µm2 6T-SRAM cells, featuring high-k/metal-gate finfet devices, double gate patterning, a novel fin etch strategy, full-field EUV lithography and optimized junction design & layout

K. Ronse, S. Locorotondo, V. Truffert, 2010, 2010 Symposium on VLSI Technology.

Cu Resistivity Scaling Limits for 20nm Copper Damascene Lines

J. Gelatos, I. Ciofi, Z. Tokei, 2007, 2007 IEEE International Interconnect Technology Conferencee.

Demonstration of scaled 0.099µm2 FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology

R. Rajagopalan, K. Ronse, S. Locorotondo, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).