Sezer Gören

发表

FPGA Based Particle Identification in High Energy Physics Experiments

V. Ugur Güney, H. Fatih Ugurdag, Ali Basaran, 2012, 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors.

Semi- and Fully-Random Access LUTs for Smooth Functions

H. Fatih Ugurdag, Sezer Gören, Y. Serhan Gener, 2019, VLSI-SoC.

Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection

Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz, 2015, J. Electron. Test..

Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort

H. Fatih Ugurdag, Sezer Gören, Okan Palaz, 2011, JETC.

Field programmable gate arrays implementation of Dual Tree Complex Wavelet Transform

Nizamettin Aydin, Gorkem Serbes, Vecdi Emre Levent, 2015, 2015 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

Precise Vehicle Positioning for Indoor Navigation via OpenXC

Sezer Gören, Yusuf Turk, Baturay Ozcan, 2018, VEHITS.

A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers

Bilgiday Yuce, Günhan Dündar, H. Fatih Ugurdag, 2013, 2013 IEEE 21st Symposium on Computer Arithmetic.

Fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over ethernet

Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, Sezer Gören, 2014, WESS '14.

Defect-Tolerant Logic Mapping for Nanocrossbars Based on Two-Dimensional Sort

H. Fatih Ugurdag, Sezer Gören, Okan Palaz, 2010, ISCIS.

Enabling difference-based dynamic partial self reconfiguration for large differences

H. Fatih Ugurdag, Sezer Gören, Abdullah Yildiz, 2013, 2013 8th IEEE Design and Test Symposium.

An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays

Nizamettin Aydin, Gorkem Serbes, Vecdi Emre Levent, 2015, 2015 IEEE 15th International Conference on Bioinformatics and Bioengineering (BIBE).

Test sequence generation for controller verification and test with high coverage

F. Joel Ferguson, Sezer Gören, Sezer Gören, 2006, TODE.

Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection

Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz, 2016, J. Electron. Test..

Testing finite state machines based on a structural coverage metric

F. Joel Ferguson, Sezer Gören, Sezer Gören, 2002, Proceedings. International Test Conference.

A Deep Learning Based Distributed Smart Surveillance Architecture using Edge and Cloud Computing

Sezer Gören, Halil Can Kaskavalci, Sezer Gören, 2019, 2019 International Conference on Deep Learning and Machine Learning in Emerging Applications (Deep-ML).

Ultra-fast curve fitting for pulses on FPGA

V. Ugur Güney, H. Fatih Ugurdag, Ali Basaran, 2012, 2012 20th Signal Processing and Communications Applications Conference (SIU).

Checking sequence generation for asynchronous sequential elements

F. Joel Ferguson, Sezer Gören, Sezer Gören, 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

Reconfigurable hardware-based genome aligner using quality scores

Cem Ünsalan, Sezer Gören, Mehmet Yagmur Gok, 2013, 2013 21st Signal Processing and Communications Applications Conference (SIU).

Embedded tutorials: Embedded tutorial 1: Cell-aware test-from gates to transistors

Abhijit Chatterjee, Miodrag Potkonjak, Adit D. Singh, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Defect-aware nanocrossbar logic mapping using Bipartite Subgraph Isomorphism & canonization

H. Fatih Ugurdag, Sezer Gören, Okan Palaz, 2010, 2010 15th IEEE European Test Symposium.

Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration

Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, H. Fatih Ugurdag, 2013, Comput. Electr. Eng..

FPGA design security with time division multiplexed PUFs

H. Fatih Ugurdag, Sezer Gören, Abdullah Yildiz, 2010, 2010 International Conference on High Performance Computing & Simulation.

Efficient Combinational Circuits for Division by Small Integer Constants

Vecdi Emre Levent, H. Fatih Ugurdag, Sezer Gören, 2016, 2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH).

Improving Driver Behavior Using Gamification

Sezer Gören, Gorkem Kar, Simge Helvaci, 2018, MobiWIS.

Output Domain Downscaler

Vecdi Emre Levent, Mustafa Tosun, Aydin Emre Guzel, 2016, ISCIS.

Chesmin: a heuristic for state reduction in incompletely specified finite state machines

F. Joel Ferguson, Sezer Gören, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Programmable Hardware Based Short Read Aligner Using Phred Quality Scores

Cem Ünsalan, Sezer Gören, Mehmet Yagmur Gok, 2013, 2013 International Conference on Social Computing.

Reducing compilation time of Zhong's FPGA-based SAT solver

J. Xu, M. Zhu, X. Wang, 1999, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00375).

On state reduction of incompletely specified finite state machines

F. Joel Ferguson, Sezer Gören, Sezer Gören, 2007, Comput. Electr. Eng..

FPGA bitstream protection with PUFs, obfuscation, and multi-boot

H. Fatih Ugurdag, Sezer Gören, Abdullah Yildiz, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Population-Based FPGA Solution to Mastermind Game

H. Fatih Ugurdag, Sezer Gören, Onur Baskirt, 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

Development of a Mobile News Reader Application Compatible with In-Vehicle Infotainment

Sezer Gören, Basak Kurt, 2018, MobiWIS.

Optimization of Embedded Controllers Based on Redundant Transition Removal and Fault Simulation Using k-WISE Tests

Sezer Gören, Sezer Gören, 2009, J. Circuits Syst. Comput..

Real Time Wireless Packet Monitoring with Raspberry Pi Sniffer

Onur Demir, Sezer Gören, Yusuf Turk, 2014, ISCIS.

Hardware Division by Small Integer Constants

H. Fatih Ugurdag, Sezer Gören, Y. Serhan Gener, 2017, IEEE Transactions on Computers.

Generating fast logic circuits for m-select n-port Round Robin Arbitration

H. Fatih Ugurdag, Sezer Gören, Fatih Temizkan, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Tools and Techniques for Implementation of Real-time Video Processing Algorithms

Vecdi Emre Levent, Mustafa Tosun, Aydin Emre Guzel, 2019, J. Signal Process. Syst..

Gravitational pose estimation

H. Fatih Ugurdag, Sezer Gören, Ferhat Canbay, 2010, Comput. Electr. Eng..

On optimization of multi-cycle tests for test quality and application time

Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz, 2016, 2016 IEEE East-West Design & Test Symposium (EWDTS).

Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers

Bilgiday Yuce, Günhan Dündar, H. Fatih Ugurdag, 2014, IEEE Transactions on Computers.

Achieving modular dynamic partial reconfiguration with a difference-based flow (abstract only)

H. Fatih Ugurdag, Sezer Gören, Abdullah Yildiz, 2013, FPGA '13.

Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression

Aydin Emre Guzel, H. Fatih Ugurdag, Sezer Gören, 2017, Integr..

Smartphone power management based on ConvLSTM model

Sezer Gören, Emre Çiçek, 2021, Neural Comput. Appl..

Prediction of cyclosporine A blood levels: an application of the adaptive-network-based fuzzy inference system (ANFIS) in assisting drug therapy

Adem Karahoca, Sezer Gören, Filiz Y. Onat, 2008, European Journal of Clinical Pharmacology.