P. P. Tirumalai

Code generation schema for modulo scheduled loops

B. R. Rau, Mike Schlansker, P. P. Tirumalai, 1992, MICRO 1992.

Register Allocation for Modulo Scheduled Loops: Strategies, Algorithms and Heuristics

Michael S. Schlansker, B. R. Rau, P. P. Tirumalai, 1992 .

Multiple-valued programmable logic arrays

P. P. Tirumalai, 1989 .

Analysis of minimization algorithms for multiple-valued programmable logic arrays

Jon T. Butler, P. P. Tirumalai, 1988 .

Prime and non-prime implicants in the minimization of multiple-valued logic functions

P. P. Tirumalai, J. T. Butler, 1989, Proceedings. The Nineteenth International Symposium on Multiple-Valued Logic.