C.W. Werner

Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery

E. Alon, M.A. Horowitz, V. Stojanovic, 2005, IEEE Journal of Solid-State Circuits.

A 2 Gb/s/pin 4-PAM parallel bus interface with transmit crosstalk cancellation, equalization, and integrating receivers

C.W. Werner, J.L. Zerbe, Gong Jong Yeh, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

1.6 Gb/s/pin 4-PAM signaling and circuits for a multi-drop bus

B.W. Garlepp, C.W. Werner, J.L. Zerbe, 2000, 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).

PLL On-Chip Jitter Measurement: Analysis and Design

V. Stojanovic, C.W. Werner, J.L. Zerbe, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..