D. Antrik

Notice of Violation of IEEE Publication Principles "A 2-5GHz low jitter 0.13 μm CMOS PLL using a dynamic current matching charge-pump and a noise attenuating loop-filter (frequency synthesizer application)"

C. Turinici, M. Gheorge, S. Dupue, 2004 .

Notice of Violation of IEEE Publication PrinciplesA 12.5GHz SiGe BICMOS limiting amplifier using a dual offset cancellation loop

A. Maxim, D. Antrik, 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

Notice of Violation of IEEE Publication Principles

C. Turinici, M. Gheorge, S. Dupue, 2004 .