Y. Tamaki

发表

Evaluation of the scaling limit of a narrow U-groove isolation structure by using test structures

Y. Tamaki, T. Hashimoto, 1998, ICMTS 1998. Proceedings of 1998 International Conference on Microelectronic Test Structures (Cat. No.98CH36157).

A 0.35 /spl mu/m ECL-CMOS process technology on SOI for 1 ns mega-bits SRAMs with 40 ps gate array

Toshiyuki Kikuchi, S. Wada, T. Ikeda, 1995, Proceedings of International Electron Devices Meeting.

SPOTEC-a sub-10- mu m/sup 2/ bipolar transistor structure using fully self-aligned sidewall polycide base technology

Fumio Murai, Tokuo Kure, Takahiro Onai, 1991, International Electron Devices Meeting 1991 [Technical Digest].

A 64-GHz f/sub T/ and 3.6-V BV/sub CEO/ Si bipolar transistor using in situ phosphorus-doped and large-grained polysilicon emitter contacts

M. Tanabe, Y. Tamaki, Takashi Kobayashi, 1993 .

A 9.4-/spl mu/m/sup 2/ 38-GHz sidewall polycide base bipolar (SPOTEC) with half-micron CMOS technology for very-high-speed ULSIs

T. Kure, T. Shiba, Y. Tamaki, 1993, 1993 Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

In situ phosphorus-doped polysilicon emitter technology for very high-speed, small emitter bipolar transistors

K. Ohnishi, Takeo Shiba, Y. Tamaki, 1996 .

Hetero-emitter-like characteristics of phosphorus doped polysilicon emitter transistors. Part I: band structure in the polysilicon emitter obtained from electrical measurements

Y. Tamaki, Y. Tamaki, M. Kondo, 1995 .

15-ps ECL/74-GHz f/sub T/ Si bipolar technology

T. Shiba, Y. Tamaki, Y. Kiyota, 1993, Proceedings of IEEE International Electron Devices Meeting.

Very-high-speed silicon bipolar transistors with in-situ doped polysilicon emitter and rapid vapor-phase doping base

Toshiyuki Kikuchi, Takeo Shiba, Yukihiro Kiyota, 1995 .

U-groove isolation technique for high speed bipolar VLSI's

K. Ogiue, M. Kawamura, Y. Tamaki, 1982, 1982 International Electron Devices Meeting.

A fine emitter transistor fabricated by electron-beam lithography for high-speed bipolar LSI's

F. Murai, Y. Tamaki, A. Anzai, 1986, IEEE Electron Device Letters.

A 64 GHz Si bipolar transistor using in-situ phosphorus doped polysilicon emitter technology

Tokuo Kure, M. Tanabe, S. Iijima, 1991, International Electron Devices Meeting 1991 [Technical Digest].