Y. Amar Babu

Design of Low-Power and High-Performance Network Interface for 2 × 2 SDM-Based NoC and Implementation on Spartan 6 FPGA

Y. Amar Babu, G. M. V. Prasad, John Bedford Solomon, 2018 .

Power Analysis and Implementation of Low-Power Design for Test Architecture for UltraSPARC Chip Multiprocessor

Y. Amar Babu, John Bedford Solomon, D Jackuline Moni, 2018 .

Design and implementation of low power and high performance network interface for 2×2 SDM based NoC

Y. Amar Babu, John Bedford Solomon, G. M. V. Prasad, 2017, 2017 4th International Conference on Advanced Computing and Communication Systems (ICACCS).

Performance Analysis and Implementation of Highly Reconfigurable Modified SDM-Based NoC for MPSoC Platform on Spartan6 FPGA

Y. Amar Babu, G. M. V. Prasad, Y. Babu, 2018 .

FPGA Implementation of Buffer-Less NoC Router for SDM-Based Network-on-Chip

Y. Amar Babu, John Bedford Solomon, G. M. V. Prasad, 2018 .

Evaluation Of Microblaze and ImplementationOf AES Algorithm using Spartan-3E

Y. Amar Babu, M.Sambasiva Reddy, 2013 .