Devendra Kumar Gautam

发表

Design a Low Power High Speed Full Adder Using AVL Technique Based on CMOS Nano-Technology

Devendra Kumar Gautam, S R P Sinha, 2013 .

Evaluation of Academic Digital Libraries

Devendra Kumar Gautam, D. Gautam, 2016 .

Design a Low Power Half-Subtractor Using AVL Technique Based on 65nm CMOS Technology

Devendra Kumar Gautam, Dr. S R P Sinha, Er. Yogesh Kumar Verma, 2013 .