Ioannis Papaefstathiou

发表

Breaking the GSM A5/1 cryptography algorithm with rainbow tables and high-end FPGAS

Maria Kalenderi, Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

A low-power processor architecture optimized for wireless devices

Ioannis Papaefstathiou, Aristides Efthymiou, Jim D. Garside, 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

Energy-Efficient Heterogeneous Computing at exaSCALE—ECOSCALE

Luciano Lavagno, Ioannis Papaefstathiou, Konstantinos Georgopoulos, 2019 .

FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels

Luciano Lavagno, Florian Schäfer, Ioannis Papaefstathiou, 2012, 2012 15th Euromicro Conference on Digital System Design.

A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems

Ioannis Papaefstathiou, Joannis Sotiropoulos, 2009, 2009 International Conference on Field Programmable Logic and Applications.

A Multi Gigabit FPGA-Based 5-tuple Classification System

Ioannis Papaefstathiou, Antonis Nikitakis, I. Papaefstathiou, 2008, 2008 IEEE International Conference on Communications.

An Open-Source High-Throughput, Reduced Memory Footprint, Face Detection, Pose Estimation and Landmark Localization System

Ioannis Papaefstathiou, Antonis Nikitakis, Panos Kalodimas, 2019, 2019 22nd Euromicro Conference on Digital System Design (DSD).

The Industrial Internet of Things as an enabler for a Circular Economy Hy-LP: A novel IIoT protocol, evaluated on a wind park's SDN/NFV-enabled 5G industrial network

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, Giorgos Demetriou, 2018, Comput. Commun..

Power Consumption Estimations vs Measurements for FPGA-Based Security Cores

Ioannis Papaefstathiou, Dimitrios Meintanis, 2008, 2008 International Conference on Reconfigurable Computing and FPGAs.

Fast, FPGA-based Rainbow Table creation for attacking encrypted mobile communications

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Charalampos Manifavas, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

A FPGA based coprocessor for gene finding using Interpolated Markov Model (IMM)

Ioannis Papaefstathiou, Apostolos Dollas, Euripides Sotiriades, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Measurement Based Connection Admission Control Algorithm for ATM Networks that Use Low Level Compression

Ioannis Papaefstathiou, 2000, IS&N.

Evaluation of External Memory Access Performance on a High-End FPGA Hybrid Computer

Ioannis Papaefstathiou, Apostolos Dollas, Konstantinos Kalaitzis, 2016, Comput..

GFS: An Efficient Implementation of Fair Scheduling for Mult-Gigabit Packet Networks

Theofanis Orphanoudakis, George Kornaros, Ioannis Papaefstathiou, 2003, ASAP.

Design space exploration of reconfigurable systems for calculating flying object's optimal noise reduction paths

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Dimitrios Kontos, 2009, 2009 International Conference on Field Programmable Logic and Applications.

An innovative low-cost Classification Scheme for combined multi-Gigabit IP and Ethernet Networks

Ioannis Papaefstathiou, Vassilis Papaefstathiou, 2006, 2006 IEEE International Conference on Communications.

A Memory-Efficient FPGA-based Classification Engine

Ioannis Papaefstathiou, Antonis Nikitakis, I. Papaefstathiou, 2008, 2008 16th International Symposium on Field-Programmable Custom Computing Machines.

HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE

Luciano Lavagno, Ioannis Papaefstathiou, Konstantinos Georgopoulos, 2018, ARC.

Lightweight Password Hashing Scheme for Embedded Systems

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, Charalampos Manifavas, 2015, WISTP.

Efficient Testbench Code Synthesis for a Hardware Emulator System

Ioannis Papaefstathiou, Ioannis Mavroidis, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Using hardware-based forward error correction to reduce the overall energy consumption of WSNs

Ioannis Papaefstathiou, Andreas Brokalakis, 2012, 2012 IEEE Wireless Communications and Networking Conference (WCNC).

An Open-Source Scaled Automobile Platform for Fault-Tolerant Electronic Stability Control

Ioannis Papaefstathiou, Diomidis I. Katzourakis, Michail G. Lagoudakis, 2010, IEEE Transactions on Instrumentation and Measurement.

Accelerating Intercommunication in Highly Parallel Systems

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Pavlos M. Mattheakis, 2016, ACM Trans. Archit. Code Optim..

Implementing Rainbow Tables in High-End FPGAs for Super-Fast Password Cracking

Ioannis Papaefstathiou, Charalampos Manifavas, Kostas Theocharoulis, 2010, 2010 International Conference on Field Programmable Logic and Applications.

MPLEM: An 80-processor FPGA Based Multiprocessor System

Ioannis Papaefstathiou, Georgios-Grigorios Mplemenos, 2008, 2008 16th International Symposium on Field-Programmable Custom Computing Machines.

Read, use, simulate, experiment and build: an integrated approach for teaching computer architecture

Ioannis Papaefstathiou, Christos P. Sotiriou, I. Papaefstathiou, 2002, WCAE '02.

HPC-gSpan: An FPGA-based parallel system for frequent subgraph mining

Ioannis Papaefstathiou, Athanasios Stratikopoulos, Apostolos Dollas, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

XSACd - Cross-domain resource sharing & access control for smart environments

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, Charalampos Manifavas, 2018, Future Gener. Comput. Syst..

HEAP: A Highly Efficient Adaptive Multi-processor Framework

Luciano Lavagno, Florian Schäfer, Bart Kienhuis, 2012, DSD.

An Architecture for the Acceleration of a Hybrid Leaky Integrate and Fire SNN on the Convey HC-2ex FPGA-Based Processor

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Apostolos Dollas, 2017, 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

A novel background subtraction scheme for in-camera acceleration in thermal imagery

Ioannis Papaefstathiou, Antonis Nikitakis, Konstantinos Makantasis, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes

Ioannis Papaefstathiou, Andreas Brokalakis, Georgios Chatziparaskevas, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Novel and Highly Efficient Reconfigurable Implementation of Data Mining Classification Tree

Ioannis Papaefstathiou, Apostolos Dollas, Grigorios Chrysos, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

Accelerating ATM: on-line compression of ATM streams

Ioannis Papaefstathiou, 1999, IPCCC.

An Open-Source Extendable, Highly-Accurate and Security Aware CPS Simulator

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Andreas Brokalakis, 2017, 2017 13th International Conference on Distributed Computing in Sensor Systems (DCOSS).

An efficient FPGA-based implementation of Pollard's (ρ - 1) factorization algorithm

Ioannis Papaefstathiou, Dimitrios Meintanis, I. Papaefstathiou, 2007, 2007 International Conference on Field-Programmable Technology.

Compressing ATM Streams On-Line

Ioannis Papaefstathiou, 1999, Data Compression Conference.

Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors

Theofanis Orphanoudakis, George Kornaros, Ioannis Papaefstathiou, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

RESENSE: An Innovative, Reconfigurable, Powerful and Energy Efficient WSN Node

Ioannis Papaefstathiou, Andreas Brokalakis, Konstantinos Papadopoulos, 2011, 2011 IEEE International Conference on Communications (ICC).

Node.DPWS: High performance and scalable Web Services for the IoT pdf

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Fysarakis, 2015, ArXiv.

Packet Processing acceleration with a 3-stage programmable pipeline engine

Nikos A. Nikolaou, Nicholaos Zervos, Ioannis Papaefstathiou, 2004, IEEE Communications Letters.

Lightweight authenticated encryption for embedded on-chip systems

Ioannis Papaefstathiou, Charalampos Manifavas, George Floros, 2016, Inf. Secur. J. A Glob. Perspect..

COSSIM: An Open-Source Integrated Solution to Address the Simulator Gap for Systems of Systems

Ioannis Papaefstathiou, Ioannis Sourdis, Nikolaos Tampouratzis, 2018, 2018 21st Euromicro Conference on Digital System Design (DSD).

An IRAM-based architecture for a single-chip ATM switch

Ioannis Papaefstathiou, Shie-Yuan Wang, Wenjian Yang, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

Accelerating hardware simulation: Testbench code emulation

Ioannis Papaefstathiou, Iakovos Mavroidis, 2008, 2008 International Conference on Field-Programmable Technology.

Titan II: an IPcomp processor for 10-Gbps networks

Ioannis Papaefstathiou, 2004, IEEE Design & Test of Computers.

Building an FoC Using Large, Buffered Crossbar Cores

Ioannis Papaefstathiou, Manolis Katevenis, Dimitrios Simos, 2008, IEEE Design & Test of Computers.

An Embedded Networking SoC for purely Ethernet MANs/WANs

Theofanis Orphanoudakis, George Kornaros, Ioannis Papaefstathiou, 2007, 2007 12th IEEE Symposium on Computers and Communications.

Extending the Forward Error Correction Paradigm for Multi-Hop Wireless Sensor Networks

Ioannis Papaefstathiou, Andreas Brokalakis, Ioannis Chondroulis, 2018, 2018 9th IFIP International Conference on New Technologies, Mobility and Security (NTMS).

An FPGA-based queue management system for high speed networking devices

George Kornaros, Ioannis Papaefstathiou, Christoforos Kachris, 2004, Microprocess. Microsystems.

A Hardware-Engine for Layer-2 classification in low-storage, ultra high bandwidth environments

Ioannis Papaefstathiou, Vassilis Papaefstathiou, 2006, Proceedings of the Design Automation & Test in Europe Conference.

WSACd - A Usable Access Control Framework for Smart Home Devices

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Rantos, 2015, WISTP.

AmbISPDM - Managing embedded systems in ambient environments and disaster mitigation planning

Ioannis Papaefstathiou, Charalampos Manifavas, Nikos Papadakis, 2018, Applied intelligence (Boston).

SCOTRES: Secure Routing for IoT and CPS

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2017, IEEE Internet of Things Journal.

Efficient hardware implementations for the DES family

Ioannis Papaefstathiou, C. Manifavas, C. Sotiriou, 2006 .

Password Hashing Competition - Survey and Benchmark

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2015, IACR Cryptol. ePrint Arch..

Fast and power-efficient hardware implementation of a routing scheme for WSNs

Ioannis Papaefstathiou, Georgios-Grigorios Mplemenos, 2012, 2012 IEEE Wireless Communications and Networking Conference (WCNC).

Comparing C and SystemC Based HLS Methods for Reconfigurable Systems Design

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Konstantinos Georgopoulos, 2018, ARC.

Node.DPWS: Efficient Web Services for the Internet of Things

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Fysarakis, 2016, IEEE Software.

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration

Wayne Luk, Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, 2012, DSD.

SecRoute: End-to-end secure communications for wireless ad-hoc networks

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, George Hatzivasilis, 2017, 2017 IEEE Symposium on Computers and Communications (ISCC).

Design-space exploration of a cryptography algorithm

Ioannis Papaefstathiou, Christos P. Sotiriou, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Queue management in network processors

Theofanis Orphanoudakis, George Kornaros, Ioannis Papaefstathiou, 2005, Design, Automation and Test in Europe.

A Fast FPGA-Based 2-Opt Solver for Small-Scale Euclidean Traveling Salesman Problem

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Ioannis Mavroidis, 2007, 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007).

Reconfiguring the Bioinformatics Computational Spectrum: Challenges and Opportunities of FPGA-Based Bioinformatics Acceleration Platforms

Theocharis Theocharides, Ioannis Papaefstathiou, Vasilis J. Promponas, 2014, IEEE Design & Test.

Implementation of a genetic algorithm on a virtex-ii pro FPGA

Ioannis Papaefstathiou, Kyprianos Papademetriou, Michalis Vavouras, 2009, FPGA '09.

Variable packet size buffered crossbar (CICQ) switches

Ioannis Papaefstathiou, Manolis Katevenis, Nikolaos Chrysos, 2004, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577).

Fast and Efficient FPGA-Based Feature Detection Employing the SURF Algorithm

Ioannis Papaefstathiou, Antonis Nikitakis, Dimitris Bouris, 2010, 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines.

Real-time management of railway CPS secure administration of IoT and CPS infrastructure

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2017, 2017 6th Mediterranean Conference on Embedded Computing (MECO).

Reconfigurable Computing IP Cores for Multiple Sequence Alignment

Ioannis Papaefstathiou, Apostolos Dollas, Euripides Sotiriades, 2011, BIOINFORMATICS.

An innovative scheduling scheme for high-speed network processors

Nicholaos Zervos, George E. Konstantoulakis, Theofanis Orphanoudakis, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Significantly reducing MPI intercommunication latency and power overhead in both embedded and HPC systems

Ioannis Papaefstathiou, Pavlos M. Mattheakis, I. Papaefstathiou, 2013, TACO.

RtVMF: A Secure Real-Time Vehicle Management Framework

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2016, IEEE Pervasive Computing.

Which IoT Protocol? Comparing Standardized Approaches over a Common M2M Application

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, Charalampos Manifavas, 2016, 2016 IEEE Global Communications Conference (GLOBECOM).

FPGA power consumption measurements and estimations under different implementation parameters

Ioannis Papaefstathiou, Konstantinos Georgopoulos, Dimitrios Meidanis, 2011, 2011 International Conference on Field-Programmable Technology.

Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Ioannis Mavroidis, 2007, 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07).

Policy-based access control for DPWS-enabled ubiquitous devices

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Rantos, 2014, Proceedings of the 2014 IEEE Emerging Technology and Factory Automation (ETFA).

Highly parallel implementation of Sphinx-3 voice recognition algorithm

Ioannis Papaefstathiou, Dimitris Tsiamasiotis, Charalampos Manifavas, 2013, 2013 Africon.

Memory-Efficient 5D Packet Classification At 40 Gbps

Ioannis Papaefstathiou, Vassilis Papaefstathiou, I. Papaefstathiou, 2007, IEEE INFOCOM 2007 - 26th IEEE International Conference on Computer Communications.

A Reasoning System for Composition Verification and Security Validation

Ioannis Papaefstathiou, Charalampos Manifavas, Nikos Papadakis, 2014, 2014 6th International Conference on New Technologies, Mobility and Security (NTMS).

Titan-R: A Reconfigurable Hardware Implementation of a High-Speed Compressor

Ioannis Papaefstathiou, Konstantinos Papadopoulos, 2008, 2008 16th International Symposium on Field-Programmable Custom Computing Machines.

HC-CART: A parallel system implementation of data mining classification and regression tree (CART) algorithm on a multi-FPGA system

Ioannis Papaefstathiou, Apostolos Dollas, Grigorios Chrysos, 2013, TACO.

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration

Wayne Luk, Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, 2012, 2012 15th Euromicro Conference on Digital System Design.

Fast and efficient FPGA-based Euro coin identification

Ioannis Papaefstathiou, Konstantinos Georgopoulos, 2014, Proceedings ELMAR-2014.

Securing wireless sensor networks towards a trusted "Internet of Things"

Theodore B. Zahariadis, Federico Alvarez, Ioannis Papaefstathiou, 2009, Future Internet Assembly.

Titan-R: A Multigigabit Reconfigurable Combined Compression/Decompression Unit

Ioannis Papaefstathiou, Konstantinos Papadopoulos, 2010, TRETS.

An Innovative Resource Management Scheme for Multi-gigabit Networking Systems

George Kornaros, Ioannis Papaefstathiou, 2003, HSNMC.

Evaluation of RPL with a transmission count-efficient and trust-aware routing metric

Theodore B. Zahariadis, Ioannis Papaefstathiou, Panagiotis Karkazis, 2014, 2014 IEEE International Conference on Communications (ICC).

Design and implementation of a database filter for BLAST acceleration

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Euripides Sotiriades, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Evaluating routing metric composition approaches for QoS differentiation in low power and lossy networks

Theodore B. Zahariadis, Ioannis Papaefstathiou, Helen-Catherine Leligou, 2013, Wirel. Networks.

Embedded Systems Security: A Survey of EU Research Efforts

Ioannis Papaefstathiou, Charalampos Manifavas, Alexandros Papanikolaou, 2015, Secur. Commun. Networks.

Effective Reconfigurable Design: The FASTER Approach

Wayne Luk, Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, 2014, ARC.

HighEnd Reconfigurable Systems for Fast Windows' Password Cracking

Ioannis Papaefstathiou, Charalampos Manifavas, Kostas Theocharoulis, 2009, 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines.

A buffered crossbar-based chip interconnection framework supporting quality of service

George Kornaros, Ioannis Papaefstathiou, Nikolaos Chrysos, 2007, GLSVLSI '07.

A memory efficient, 100 Gb/sec MAC classification engine

Ioannis Papaefstathiou, Vassilis Papaefstathiou, 2005, The IEEE Conference on Local Computer Networks 30th Anniversary (LCN'05)l.

Data-Driven Background Subtraction Algorithm for In-Camera Acceleration in Thermal Imagery

Ioannis Papaefstathiou, Konstantinos Makantasis, Anastasios D. Doulamis, 2016, IEEE Transactions on Circuits and Systems for Video Technology.

Accelerating Emulation and Providing Full Chip Observability and Controllability

Ioannis Papaefstathiou, Iakovos Mavroidis, Ioannis Mavroidis, 2009, IEEE Design & Test of Computers.

An ultra high-speed compressor for packet networks

Ioannis Papaefstathiou, 2001, ICECS.

A self-reconfiguring architecture supporting multiple objective functions in genetic algorithms

Ioannis Papaefstathiou, Apostolos Dollas, Kyprianos Papademetriou, 2009, 2009 International Conference on Field Programmable Logic and Applications.

SqueezeJet-3: An Accelerator Utilizing FPGA MPSoCs for Edge CNN Applications

Ioannis Papaefstathiou, Loukas Petrou, Panagiotis Mousouliotis, 2020, 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

A novel embedded system for vision tracking

Ioannis Papaefstathiou, Antonis Nikitakis, Theofilos Paganos, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

SeMIBIoT: Secure Multi-Protocol Integration Bridge for the IoT

Ioannis G. Askoxylakis, Ioannis Papaefstathiou, Konstantinos Fysarakis, 2018, 2018 IEEE International Conference on Communications (ICC).

Using Reconfigurable Hardware Devices in WSNs for Reducing the Energy Consumption of Routing and Security Tasks

Ioannis Papaefstathiou, Konstantinos Papadopoulos, Georgios-Grigorios Mplemenos, 2010, 2010 IEEE Global Telecommunications Conference GLOBECOM 2010.

Parallelizing bioinformatics and security applications on a low-cost multi-core system

Ioannis Papaefstathiou, Charalampos Manifavas, Teodor Tzanoudakis, 2013, 2013 ACS International Conference on Computer Systems and Applications (AICCSA).

ROTA: An Archipelago-Wide Area Network for High Speed Communication to Ships

Ioannis Chatzigiannakis, Ioannis Papaefstathiou, Apostolos Dollas, 2012, 2012 16th Panhellenic Conference on Informatics.

Guest Editors' Introduction: Network Processors for Future High-End Systems and Applications

Nikos A. Nikolaou, Ioannis Papaefstathiou, Bharat T. Doshi, 2004, IEEE Micro.

Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU

Ioannis Papaefstathiou, Apostolos Dollas, Grigorios Chrysos, 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.

Dronesourcing: a modular, expandable multi-sensor UAV platform for combined, real-time environmental monitoring

Ioannis Papaefstathiou, Apostolos Dollas, Panagiotis Partsinevelos, 2017 .

A review of lightweight block ciphers

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2018, Journal of Cryptographic Engineering.

A novel low-power embedded object recognition system working at multi-frames per second (Extended abstract)

Ioannis Papaefstathiou, Antonis Nikitakis, Savvas Papaioannou, 2012, 2012 IEEE 10th Symposium on Embedded Systems for Real-time Multimedia.

Highly efficient reconfigurable parallel graph cuts for embedded vision

Ioannis Papaefstathiou, Antonis Nikitakis, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Heavily Reducing WSNs' Energy Consumption by Employing Hardware-Based Compression

Ioannis Papaefstathiou, Grigorios Chrysos, 2009, ADHOC-NOW.

Software processing performance in network processors

Nicholaos Zervos, George Kornaros, Ioannis Papaefstathiou, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

IPv6 security for low power and lossy networks

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Rantos, 2013, 2013 IFIP Wireless Days (WD).

COSSIM: A Novel, Comprehensible, Ultra-Fast, Security-Aware CPS Simulator

Ioannis Papaefstathiou, Lambros Sarakis, Grigorios Chrysos, 2015, ARC.

Parallel accelerators for GlimmerHMM bioinformatics algorithm

Ioannis Papaefstathiou, Euripides Sotiriades, Grigorios Chrysos, 2011, 2011 Design, Automation & Test in Europe.

Design-space exploration of the most widely used cryptography algorithms

Ioannis Papaefstathiou, Christos P. Sotiriou, Vassilis Papaefstathiou, 2004, Microprocess. Microsystems.

A novel low-power embedded object recognition system working at multi-frames per second (Extended abstract)

Ioannis Papaefstathiou, Antonis Nikitakis, Savvas Papaioannou, 2012, ESTImedia.

Policy-Based Access Control for Body Sensor Networks

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Rantos, 2014, WISTP.

A fully programmable memory management system optimizing queue handling at multi gigabit rates

Nicholaos Zervos, George Kornaros, Ioannis Papaefstathiou, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

Acceleration of Data Streaming Classification using Reconfigurable Technology

Ioannis Papaefstathiou, Apostolos Dollas, Grigorios Chrysos, 2015, ARC.

ModConTR: A modular and configurable trust and reputation-based system for secure routing in ad-hoc networks

Ioannis Papaefstathiou, Charalampos Manifavas, George Hatzivasilis, 2014, 2014 IEEE/ACS 11th International Conference on Computer Systems and Applications (AICCSA).

IoT design course using open-source tools

Ioannis Papaefstathiou, 2016, 2016 IEEE Global Engineering Education Conference (EDUCON).

Titan II : An IPComp Processor for 10Gbit/sec networks

Ioannis Papaefstathiou, 2003, ISVLSI.

Performance against cost trade-offs for hardware compression in 10 Gigabit networks

George Kornaros, Ioannis Papaefstathiou, 2003, ICECS.

HEAP: A Highly Efficient Adaptive Multi-processor Framework

Luciano Lavagno, Florian Schäfer, Bart Kienhuis, 2012, 2012 15th Euromicro Conference on Digital System Design.

A lightweight anonymity & location privacy service

Ioannis Papaefstathiou, Charalampos Manifavas, Konstantinos Fysarakis, 2013, IEEE International Symposium on Signal Processing and Information Technology.

Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA)

Ioannis Papaefstathiou, Charalampos Manifavas, Constantinos Stefanatos, 2010, 2010 8th Workshop on Intelligent Solutions in Embedded Systems.

High-speed FPGA-based implementations of a Genetic Algorithm

Ioannis Papaefstathiou, Kyprianos Papademetriou, Michalis Vavouras, 2009, 2009 International Symposium on Systems, Architectures, Modeling, and Simulation.

ECOSCALE: Reconfigurable computing and runtime system for future exascale systems

Luciano Lavagno, Marcello Coppola, Ioannis Papaefstathiou, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Novel, Simulator for Heterogeneous Cloud Systems that Incorporate Custom Hardware Accelerators

Ioannis Papaefstathiou, Nikolaos Tampouratzis, 2018, IEEE Transactions on Multi-Scale Computing Systems.

An open-source extendable, highly-accurate and security aware simulator for cloud applications

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Marco Marcon, 2018, 2018 21st Conference on Innovation in Clouds, Internet and Networks and Workshops (ICIN).

A novel highly flexible network multi-processor optimised for reconfigurable devices

Ioannis Papaefstathiou, Konstantinos Georgopoulos, Charalampos Manifavas, 2013, 2013 Africon.

A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems

Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Vassilis Dimopoulos, 2007, 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

An Open-source Implementation of LSTM and GRU in the Ptolemy Simulation Framework

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Panagiotis G. Mousouliotis, 2021, 2021 IEEE/ACM 25th International Symposium on Distributed Simulation and Real Time Applications (DS-RT).

Creating Customized CGRAs for Scientific Applications

Ioannis Papaefstathiou, George Charitopoulos, Dionisios Pnevmatikatos, 2021, Electronics.

Novel Reconfigurable Hardware Systems for Tumor Growth Prediction

Ioannis Papaefstathiou, Pavlos Malakonakis, Maria Papadogiorgaki, 2021, ACM Trans. Comput. Heal..

A Novel FPGA-Based Intent Recognition System Utilizing Deep Recurrent Neural Networks

Ioannis Papaefstathiou, Nikolaos Tampouratzis, Kyriaki Tsantikidou, 2021, Electronics.

DESIGN AND IMPLEMENTATION OF A TRUST-AWARE ROUTING PROTOCOL FOR LARGE WSNS

Ioannis Papaefstathiou, Panagiotis Karkazis, Panagiotis Trakadas, 2010 .

EVALUATION OF MICROPAYMENT TRANSACTION COSTS

Ioannis Papaefstathiou, Charalampos Manifavas, Canary Wharf, 2004 .