Peter Pirsch

Integrated circuit design : power and timing modeling, optimization and simulation : 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 : proceedings

Dimitrios Soudris, Erich Barke, Peter Pirsch, 2000 .

Integrated Circuit Design

Dimitrios Soudris, Erich Barke, Peter Pirsch, 2000 .

Project management and verification-the key problems of student chip design courses

Peter Pirsch, J. Jachalsky, M. B. Kulaczewski, 2002, 32nd Annual Frontiers in Education.

Architecture and Realization of HDTV Subband Filters

W. Gehrke, Marco Winzker, Peter Pirsch, 1992 .

Synthetic aperture radar with fast factorized backprojection: a scalable, platform independent architecture for exhaustive FPGA resource utilization

Holger Blume, Peter Pirsch, F. Cholewa, 2017 .

subband coding of of filterbanks HDTV signals

Marco Winzker, Peter Pirsch, K. Grüger, 1991 .

Multi-DSP board for compact real-time synthetic aperture radar systems

Peter Pirsch, J. P. Wittenburg, H. Kloos, 2001, SPIE Defense + Commercial Sensing.

HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications

Peter Pirsch, Mladen Berekovic, M. B. Kulaczewski, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

HiPAR-DSP 16: A parallel DSP for onboard real-time processing of synthetic aperture radar data

Peter Pirsch, J. P. Wittenburg, H. Kloos, 2000, IGARSS 2000. IEEE 2000 International Geoscience and Remote Sensing Symposium. Taking the Pulse of the Planet: The Role of Remote Sensing in Managing the Environment. Proceedings (Cat. No.00CH37120).

Continuous-Flow Matrix Transposition Using Memories

Mario Garrido, Peter Pirsch, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

Onboard real-time SAR processor for small platforms

Stefan Langemeyer, Christian Simon-Klar, Norman Nolte, 2004, SPIE Remote Sensing.

A compact real-time SAR processing system using the highly parallel HiPAR-DSP 16

Peter Pirsch, J. P. Wittenburg, H. Kloos, 2001, IGARSS 2001. Scanning the Present and Resolving the Future. Proceedings. IEEE 2001 International Geoscience and Remote Sensing Symposium (Cat. No.01CH37217).

A high performance digital signal processor for compact realization of real-time synthetic aperture radar systems

Peter Pirsch, J. P. Wittenburg, H. Kloos, 1999, IEEE 1999 International Geoscience and Remote Sensing Symposium. IGARSS'99 (Cat. No.99CH36293).

A core generator for fully synthesizable and highly parameterizable RISC-cores for system-on-chip designs

Peter Pirsch, Mladen Berekovic, D. Heistermann, 1998, 1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374).

VLSI chip set for 2D HDTV subband filtering with on-chip line memories

W. Gehrke, Marco Winzker, Peter Pirsch, 1993 .

Architecture of a coprocessor module for image compositing

Peter Pirsch, Mladen Berekovic, 1998, 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196).

VLSI Implementation Strategies

Peter Pirsch, 1993 .