Masakazu Hioki

发表

Four-Terminal Double-Gate Logic forLSTPApplications below32-nmTechnology Node

Hanpei Koike, M. Masahara, Toshiyuki Tsutsumi, 2006 .

Performance and yield enhancement of FPGAs with within-die variation using multiple configurations

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2007, FPGA '07.

Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device

Yohei Hori, Toshihiro Katashita, Hanpei Koike, 2018, IEICE Trans. Inf. Syst..

Architecture enhancements in 65nm SOTB power reconfigurable FPGA by fine-grained body biasing

Toshihiro Katashita, Masakazu Hioki, Hanpei Koike, 2016, 2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Reduction of overhead in adaptive body bias technology due to triple-well structure based on measurement and simulation

Yasuhiro Ogasahara, Toshiyuki Tsutsumi, Masakazu Hioki, 2015, Proceedings of the 2015 International Conference on Microelectronic Test Structures.

Utility of high on-off ratio, high off resistance rewritable device to EEPROM for ultra-low voltage operation of steep subthreshold slope FETs

Yasuhiro Ogasahara, Chao Ma, Toshitsugu Sakamoto, 2014, 2014 IEEE 6th International Memory Workshop (IMW).

May the fourth (terminal) be with you - circuit design beyond FinFET

Kunihiro Sakamoto, Toshiyuki Tsutsumi, Takashi Matsukawa, 2010, 2010 International Electron Devices Meeting.

SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

Yasuhiro Ogasahara, Chao Ma, Toshiyuki Tsutsumi, 2014 .

Compact model for ultra-short channel four-terminal DG MOSFETs for exploring circuit characteristics

Masakazu Hioki, Tadashi Nakagawa, Eiichi Suzuki, 2005 .

Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2008, TRETS.

A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2007, 2007 International Conference on Field-Programmable Technology.

Optimal set of body bias voltages for an FPGA with field-programmable V/sub th/ components

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Evaluation of granularity on threshold voltage control in flex power FPGA

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2006, FPT.

Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2007, IEICE Trans. Inf. Syst..

Towards large-scale superconducting quantum annealers: 2.5D packaging technology and application specific architecture

Hiroshi Nakagawa, Toshihiro Katashita, Shuichi Nagasawa, 2018 .

More than an order of magnitude energy improvement of FPGA by combining 0.4V operation and Multi-Vt optimization of 20k body bias domains

Yasuhiro Ogasahara, Chao Ma, Toshiyuki Tsutsumi, 2014, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology

Hanpei Koike, Masakazu Hioki, H. Koike, 2016, IEICE Trans. Inf. Syst..

Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control

Hanpei Koike, Masakazu Hioki, Tadashi Nakagawa, 2012 .

Fully-functional FPGA prototype with fine-grain programmable body biasing

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2013, FPGA '13.

Consistent Simulation Evaluation of Flex Power FPGA from Circuit Level to Chip Level

Masakazu Hioki, Tadashi Nakagawa, Takashi Kawanami, 2006 .

An analysis of program and erase operation for FC-SGT flash memory cells

Tetsuo Endoh, Fujio Masuoka, Masakazu Hioki, 2000, 2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502).

Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2004, FPGA '04.

The first SOTB implementation of Flex Power FPGA

Yasuhiro Ogasahara, Chao Ma, Toshiyuki Tsutsumi, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Evaluation of granularity on threshold voltage control in flex power FPGA

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2006, 2006 IEEE International Conference on Field Programmable Technology.

An Analysis of Program and Erase Mechanisms for Floating Channel Type Surrounding Gate Transistor Flash Memory Cells

Tetsuo Endoh, Fujio Masuoka, Masakazu Hioki, 2004 .

Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2004, IEICE Trans. Inf. Syst..