H. Shichijo

发表

Future Perspective of RF and Analog/Mixed-Signal Integrated Circuit Technologies for Mobile Communications

Bin Zhao, H.S. Bennett, J.C. Costa, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

Device and technology evolution for Si-based RF integrated circuits

H.S. Bennett, J.C. Costa, P.E. Cottrell, 2005, IEEE Transactions on Electron Devices.

RF, Analog and Mixed Signal Technologies for Communication ICs - An ITRS Perspective

H.S. Bennett, A.A. Immorlica, W.M. Huang, 2006, 2006 Bipolar/BiCMOS Circuits and Technology Meeting.

A re-examination of practical scalability limits of n-channel and p-channel MOS devices for VLSI

H. Shichijo, 1981, 1981 International Electron Devices Meeting.

5-V tolerant fail-safe ESD solutions for 0.18µm logic CMOS process

C. Duvvury, H. Shichijo, K. Kunz, 2001, 2001 Electrical Overstress/Electrostatic Discharge Symposium.

45nm low-power CMOS SoC technology with aggressive reduction of random variation for SRAM and analog transistors

H. Shichijo, G. Baldwin, K. Benaissa, 2008, 2008 Symposium on VLSI Technology.

0.1 /spl mu/m RFCMOS on high resistivity substrates for system on chip (SOC) applications

H. Shichijo, N. Mahalingam, J. Ai, 2002, Digest. International Electron Devices Meeting,.

Analog integration in a 0.35 /spl mu/m Cu metal pitch, 0.1 /spl mu/m gate length, low-power digital CMOS technology

H. Shichijo, R. Aggarwal, P. Madhani, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Trench transistor DRAM cell

H. Shichijo, P.K. Chatterjee, C.-P. Wang, 1986, IEEE Electron Device Letters.

Transistor design issues in integrating analog functions with high performance digital CMOS

H. Shichijo, R. Aggarwal, A. Chatterjee, 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

Impact of interconnect technology scaling on SOC design methodologies

H. Shichijo, P.R. Chidambaram, N.S. Nagaraj, 2005, Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..

High-Voltage Drain Extended MOS Transistors for 0.18 um Logic CMOS Process

H. Shichijo, D. Mosher, T. Efland, 2000, 30th European Solid-State Device Research Conference.

Foreword special issue on device integration technology for mixed-signal SOC

A. Matsuzawa, John D. Cressler, D.B.M. Klaassen, 2003 .

Characteristics and three-dimensional integration of MOSFET's in small-grain LPCVD polycrystalline Silicon

H. Shichijo, P.K. Chatterjee, S.D.S. Malhi, 1985, IEEE Transactions on Electron Devices.

Direct measurement for SOI and bulk diodes of single-event-upset charge collection from energetic ions and alpha particles

H. Shichijo, J. Seitchik, T. Aton, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

GaAs-on-silicon integrated circuits; Savior for GaAs ? or for Si ?

H. Shichijo, R.J. Matyi, 1987, 1987 International Electron Devices Meeting.

Broadband Root-Mean-Square Detector in CMOS for On-Chip Measurements of Millimeter-Wave Voltages

K. O. Kenneth, H. Shichijo, H. Shichijo, 2012, IEEE Electron Device Letters.

p-Channel MOSFET's in LPCVD PolySilicon

H. Shichijo, P.K. Chatterjee, S.D.S. Malhi, 1983, IEEE Electron Device Letters.

A Transmission Line Model for Silicided Diffusions: Impact on the Performance of VLSI Circuits

H. Shichijo, D.B. Scott, W.R. Hunter, 1982, IEEE Journal of Solid-State Circuits.

Characteristics and Three-Dimensional Integration of MOSFET's in Small-Grain LPCVD Polycrystalline Silicon

H. Shichijo, S.D.S. Malhi, A.H. Shah, 1985, IEEE Journal of Solid-State Circuits.

Circuit Techniques For A Wide Word I/O Path 64 Meg DRAM

R. Rountree, K. Fung, T. Suzuki, 1991, 1991 Symposium on VLSI Circuits.

Trench capacitor leakage in Mbit DRAMs

H. Shichijo, P.K. Chatterjee, A.H. Shah, 1984, 1984 International Electron Devices Meeting.

A Physical Understanding of RF Noise in Bulk nMOSFETs With Channel Lengths in the Nanometer Regime

H. Shichijo, C. Machala, R. P. Jindal, 2012, IEEE Transactions on Electron Devices.

off-State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric Breakdown

H. Shichijo, H. Kufluoglu, D. Varghese, 2007, IEEE Transactions on Electron Devices.

GaAs/AlGaAs heterojunction emitter-down bipolar transistors fabricated on GaAs-on-Si substrate

H. Shichijo, H. Shichijo, L.T. Tran, 1987, IEEE Electron Device Letters.

Anomalous leakage current in LPCVD PolySilicon MOSFET's

H. Shichijo, A. Ortiz-Conde, S.K. Banerjee, 1985, IEEE Transactions on Electron Devices.

A transmission line model for silicided diffusions: Impact on the performance of VLSI circuits

H. Shichijo, W. R. Hunter, D. B. Scott, 1982, IEEE Transactions on Electron Devices.