Tarun Kumar Gupta

发表

A 4:1 multiplexer using low-power high-speed domino technique for large fan-in gates using FinFET

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2020 .

Low leakage domino logic circuit for wide fan-in gates using CNTFET

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2019, IET Circuits Devices Syst..

Methods to design ternary gates and adders

Tarun Kumar Gupta, Yogesh Shrivastava, 2019 .

Ultra-low power FinFET-based domino circuits

Kavita Khare, R. P. Singh, Tarun Kumar Gupta, 2017 .

IJESRTJOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY A Solar Powered Air Conditioning System for Daytime Offices based on Ejector Cycle: An Alternate of Conventional Air Conditioning Systems

Tarun Kumar Gupta, Deepak Kumar, 2014 .

A Novel Leakage Reduction Technique for Ultra-Low Power VLSI Chips

Krishna Kant, Tarun Kumar Gupta, Vijay Kumar Magraiya, 2016 .

A congestion-aware and load-balanced geographic multipath routing protocol for WMN

Tarun Kumar Gupta, Priyanka Gupta, Paramjeet Kaur Bedi, 2011 .

An Improved 6-T SRAM For Better SNM And Minimum Average Power

Tarun Kumar Gupta, Upendra Babu Marri, 2014 .

AC ANALYSIS OF CURRENT MIRROR AND FOLDED CASCODE OTA: A COMPARISON USING CADENCE TOOL

Ruchi Singh, Kavita Khare, Tarun Kumar Gupta, 2009 .

Methodology for Designing a Gearbox and its Analysis

Tarun Kumar Gupta, Neeraj Patel, 2016 .

ONOFIC Pull-Up Approach in Domino Logic Circuits Using FinFET for Subthreshold Leakage Reduction

Tarun Kumar Gupta, Vijay Kumar Magraiya, T. Gupta, 2018, Circuits, Systems, and Signal Processing.

Optimization Techniques for High Performance 9T SRAM Cell Design

Tarun Kumar Gupta, Pramod Kumar Patel, M. M. Malik, 2016 .

Low Power Dropout Regulators with Efficiently Controlled Transient Response

Varun Kumar Singhal, Tarun Kumar Gupta, 2016 .

New Leakage Reduction Techniques for FinFET Technology with Its Application

Kavita Khare, Tarun Kumar Gupta, Ajay Kumar Dadoria, 2018, J. Circuits Syst. Comput..

Equivalence Checking using Assertion based Technique

Shailesh Kumar, Saurabh W. Jha, Tarun Kumar Gupta, 2015 .

A novel high-density dual threshold GNRFET SRAM design with improved stability

Tarun Kumar Gupta, Pramod Kumar Patel, M. M. Malik, 2020, Microprocess. Microsystems.

Lector with Footed-Diode Inverter: A Technique for Leakage Reduction in Domino Circuits

Kavita Khare, Tarun Kumar Gupta, T. Gupta, 2013, Circuits Syst. Signal Process..

FDSTDL: Low‐power technique for FinFET domino circuits

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2019, Int. J. Circuit Theory Appl..

Comparative analysis of various Domino logic circuits for better performance

Tarun Kumar Gupta, Ajay Kumar Dadoria, Ravikant Thakur, 2014, 2014 International Conference on Advances in Electronics Computers and Communications.

ONOFIC‐based leakage reduction technique for FinFET domino circuits

Tarun Kumar Gupta, Vijay Kumar Magraiya, T. Gupta, 2018, Int. J. Circuit Theory Appl..

A 4:1 Multiplexer using dual chirality CNTFET-based domino logic in nano-scale technology

Sandeep Garg, Tarun Kumar Gupta, Amit Pandey, 2020, International Journal of Electronics.

Ultra Low Power High Speed Domino Logic Circuit by Using FinFET Technology

Kavita Khare, Tarun Kumar Gupta, Ajay Kumar Dadoria, 2016 .

Optimizing Deep Feedforward Neural Network Architecture: A Tabu Search Based Approach

Tarun Kumar Gupta, Khalid Raza, Tarun Kumar Gupta, 2018, Neural Processing Letters.

Low power, high speed and noise immune wide-OR footless domino circuit using keeper controlled method

Shipra Upadhyay, Tarun Kumar Gupta, Amit Pandey, 2018, Analog Integrated Circuits and Signal Processing.

A New Technique for Designing Low-Power High-Speed Domino Logic Circuits in FinFET Technology

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2019, J. Circuits Syst. Comput..

A 1‐bit full adder using CNFET based dual chirality high speed domino logic

Amit Kumar Pandey, Sandeep Garg, Tarun Kumar Gupta, 2019, Int. J. Circuit Theory Appl..

Ultra-low power NAND based multiplexer and flip-flop

Tarun Kumar Gupta, Ishan Varun, 2013, 2013 Nirma University International Conference on Engineering (NUiCONE).

Performance evaluation of single-ended disturb-free CNTFET-based multi-Vt SRAM

Tarun Kumar Gupta, Pramod Kumar Patel, M. M. Malik, 2019, Microelectron. J..

Optimization of ANN Architecture: A Review on Nature-Inspired Techniques

Tarun Kumar Gupta, Khalid Raza, Tarun Kumar Gupta, 2019, Machine Learning in Bio-Signal Analysis and Diagnostic Imaging.

A Framework to Measure the Service Quality of Distributor with Fuzzy Graph Theoretic Approach

Vikram Singh, Tarun Kumar Gupta, Vikram Singh, 2016 .

Low power domino logic circuits in deep-submicron technology using CMOS

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2018, Engineering Science and Technology, an International Journal.

Delay analysis of a dynamic latched comparator

Tarun Kumar Gupta, R. K. Baghel, Salman Ulhaq, 2017, 2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE).

Techniques for Designing Analog Baseband Filter: A Review

Sandeep Garg, Tarun Kumar Gupta, 2016 .

A Novel Hybrid Precoding Technique for Millimeter Wave

Tarun Kumar Gupta, Rahul Priyadarshi, Ashok Kumar, 2018 .

Sleep signal controlled footless domino circuit for low leakage current

Tarun Kumar Gupta, Amit Pandey, Pawan Kumar Verma, 2018 .

Comparative Study of Bakhshālī Square Root Method with Newton's Iterative Method

Tarun Kumar Gupta, Nidhi Handa, S. L. Singh, 2015, SocProS.

A New Technique for Leakage Reduction in 65 nm Footerless Domino Circuits

Kavita Khare, Tarun Kumar Gupta, 2013 .

SCDNDTDL: a technique for designing low-power domino circuits in FinFET technology

Sandeep Garg, Tarun Kumar Gupta, Sandeep Garg, 2020 .

Analysis of Noise Immunity for Wide OR Footless Domino Circuit Using Keeper Controlling Network

Amit Kumar Pandey, Tarun Kumar Gupta, Pawan Kumar Verma, 2018, Circuits Syst. Signal Process..

Measurement of service quality of automobile organisation by artificial neural network

Vikram Singh, Tarun Kumar Gupta, Vikram Singh, 2017 .

A MODIFIED DOMINO LOGIC CIRCUIT FOR IMPROVED NOISE IMMUNITY AND DELAY VARIABILITY

Tarun Kumar Gupta, Ajay Kumar Dadoria, Ravikant Thakur, 2014 .

An Improved Fuzzy Voting Scheme for Fault Tolerant Systems

Shiv Prakash, Tarun Kumar Gupta, Dinesh Prasad Sahu, 2015, Int. J. Appl. Evol. Comput..

Reliable high-yield CNTFET-based 9T SRAM operating near threshold voltage region

Tarun Kumar Gupta, Pramod Kumar Patel, T. Gupta, 2018 .

Integrating sleep and pass transistor logic for leakage power reduction in FinFET circuits

Kavita Khare, Tarun Kumar Gupta, Ajay Kumar Dadoria, 2017 .