Chia Yee Ooi

发表

Some tau-equivalent classes of sequential circuits

Chia Yee Ooi, Hideo Fujiwara, 2004 .

Power-aware through-silicon-via minimization by partitioning finite state machine with datapath

Chia Yee Ooi, Ayub Chin Abdullah, Nordinah Bt Ismail, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Packet logging mechanism for adaptive online fault detection on Network-on-Chip

Chia Yee Ooi, Yuan Wen Hau, Muhammad N. Marsono, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Evaluation of SRAM PUF Characteristics and Generation of Stable Bits for IoT Security

Chia Yee Ooi, Koichiro Mashiko, Pyi Phyo Aung, 2019, IRICT.

A Fast SVM-Based Tongue's Colour Classification Aided by k-Means Clustering Identifiers and Colour Attributes as Computer-Assisted Tool for Tongue Diagnosis

Chia Yee Ooi, Fuminori Kobayashi, Nur Diyana Kamarudin, 2017, Journal of healthcare engineering.

Loop Optimizations of MGS-QRD Algorithm for FPGA High-Level Synthesis

Chia Yee Ooi, Chong Yeam Tan, Nordinah Ismail, 2019, 2019 32nd IEEE International System-on-Chip Conference (SOCC).

hpFog: A FPGA-Based Fog Computing Platform

Chia Yee Ooi, Muhammad N. Marsono, Tze Hon Tan, 2017, 2017 International Conference on Networking, Architecture, and Storage (NAS).

A Semi-Analytical Approach to Study the Energy Consumption of On-Chip Networks Testing

Chia Yee Ooi, Mahdiar Hosein Ghadiry, Mahdieh Nadi Senejani, 2013, J. Low Power Electron..

A Novel Scan Architecture for Low Power Scan-Based Testing

Chia Yee Ooi, Mahshid Mojtabavi Naeini, 2015, VLSI Design.

Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, 2020, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Dynamic reconfiguration of circuits using PSoC analog FPGAs

Chia Yee Ooi, 2013 .

A New Design-for-Testability Method Based on Thru-Testability

Chia Yee Ooi, Hideo Fujiwara, 2011, J. Electron. Test..

Toward a green electronic world: a low power design-for-testability architecture

Chia Yee Ooi, 2013 .

Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level

Chia Yee Ooi, Sreedharan Baskara Dass, Michiko Inoue, 2019, 2019 IEEE 28th Asian Test Symposium (ATS).

Built-in Self Test Power and Test Time Analysis in On-chip Networks

Chia Yee Ooi, Mahdiar Hosein Ghadiry, Mahdieh Nadi Senejani, 2015, Circuits Syst. Signal Process..

A Network-on-Chip simulation framework for homogeneous Multi-Processor System-on-Chip

Chia Yee Ooi, Yuan Wen Hau, Muhammad N. Marsono, 2011, 2011 9th IEEE International Conference on ASIC.

A New Class of Sequential Circuits with Acyclic Test Generation Complexity

Chia Yee Ooi, Hideo Fujiwara, 2006, 2006 International Conference on Computer Design.

Energy minimization for built-in self-test in system on-chip

Chia Yee Ooi, 2013 .

Classification of sequential circuits based on /spl tau//sup k/ notation

Chia Yee Ooi, Hideo Fujiwara, C. Y. Ooi, 2004, 13th Asian Test Symposium.

The Design and Implementation of a Low-Power Gating Scan Element in 32/28 nm CMOS Technology

Chia Yee Ooi, Sreedharan Baskara Dass, Mahshid Mojtabavi Naeini, 2017 .

A New Scan Design Technique Based on Pre-Synthesis Thru Functions

Chia Yee Ooi, H. Fujiwara, 2006, 2006 15th Asian Test Symposium.

A Nonscan Design-for-Testability Method for Register-Transfer-Level Circuits to Guarantee Linear-Depth Time Expansion Models

Chia Yee Ooi, Hideo Fujiwara, Tomokazu Yoneda, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Thermal Model with Metal Consideration for System-on-Chip Testing

Chia Yee Ooi, Hasliza Hassan, 2014, J. Low Power Electron..

Net Classification Based on Testability and Netlist Structural Features for Hardware Trojan Detection

Chia Yee Ooi, Sreedharan Baskara Dass, Michiko Inoue, 2019, 2019 IEEE 28th Asian Test Symposium (ATS).

Classification of Sequential Circuits Based on τ^k Notation and Its Applications(VLSI Systems)

Chia Yee Ooi, Thomas Clouqueur, Hideo Fujiwara, 2005 .

Classification of sequential circuits based on acyclic test generation complexity

Chia Yee Ooi, Hideo Fujiwara, C. Y. Ooi, 2006 .

Object-oriented test pattern generator and logic simulator for combinational circuits

Chia Yee Ooi, 2003 .

A fast and effective segmentation algorithm with automatic removal of ineffective features on tongue images

Chia Yee Ooi, Fuminori Kobayashi, Nur Diyana Kamarudin, 2016 .

A review of breast boundary and pectoral muscle segmentation methods in computer-aided detection/diagnosis of breast mammography

Chia Yee Ooi, Yuan Wen Hau, Mehrdad Moghbel, 2019, Artificial Intelligence Review.

TEST REGISTER INSERTION AT RTL BASED ON REDUCED BIST

Ahmad Zuri Sha'ameri, Chia Yee Ooi, Norlina Paraman, 2016 .

Virtual Channel and Switch Allocation for Low Latency Network-on-Chip Routers

Chia Yee Ooi, Muhammad N. Marsono, Alireza Monemi, 2015, 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines.

Adaptive Configurable Transactional Memory for Multi-processor FPGA Platforms

Chia Yee Ooi, Yuan Wen Hau, Jeevan Sirkunan, 2015, 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines.

A new class of easily testable assignment decision diagrams

Chia Yee Ooi, Norlina Paraman, Ahmad Zuri Sha'ameri, 2010 .

A Customized Reconfiguration Controller with Remote Direct ICAP Access for Dynamically Reconfigurable Platform

Chia Yee Ooi, Muhammad Nadzir Marsono, M. N. Marsono, 2017 .

drDRM: A PUF-Based Dynamically Reconfigurable DRM Mechanism for FPGA-Based Platform

Chia Yee Ooi, Muhammad N. Marsono, Tze Hon Tan, 2018, 2018 Sixth International Symposium on Computing and Networking (CANDAR).

Classification of Sequential Circuits Based on Combinational Test Generation Complexity

Chia Yee Ooi, Hideo Fujiwara, 2004 .

SVA checker generator for FPGA-based verification platform

Chia Yee Ooi, Nordinah Bt Ismail, Nurita Mohamad, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Power-aware system-on-chip test scheduling using enhanced rectangle packing algorithm

Chia Yee Ooi, Siaw Chen Lee, Jia Pao Sua, 2012, Comput. Electr. Eng..

Analysis of Test Generation Complexity for Stuck-At and Path Delay Faults Based on tauk-Notation

Chia Yee Ooi, Hideo Fujiwara, Thomas Clouqueur, 2007, IEICE Trans. Inf. Syst..

rrBox: Remote dynamically reconfigurable middlebox using NetFPGA

Chia Yee Ooi, Muhammad N. Marsono, Tze Hon Tan, 2014, 2014 14th International Symposium on Communications and Information Technologies (ISCIT).

Ping-lock round robin arbiter

Chia Yee Ooi, Maurizio Palesi, Muhammad N. Marsono, 2017, Microelectron. J..

FPGA-Assisted Assertion-Based Verification Platform

Chia Yee Ooi, Norlina Paraman, Nordinah Ismail, 2020 .

Improved Flow Control for Minimal Fully Adaptive Routing in 2D Mesh NoC

Chia Yee Ooi, Maurizio Palesi, Muhammad N. Marsono, 2016, NoCArc'16.

Low latency network-on-chip router using static straight allocator

Chia Yee Ooi, Maurizio Palesi, Muhammad Nadzir Marsono, 2016, 2016 3rd International Conference on Information Technology, Computer, and Electrical Engineering (ICITACEE).

Homogeneous Multi-Processor System-on-Chip

Chia Yee Ooi, Muhammad Nadzir Marsono, Yuan Wen Rau, 2011 .

Remote dynamically reconfigurable platform using NetFPGA

Chia Yee Ooi, Yuan Wen Hau, Muhammad N. Marsono, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

rrBox: A Remote Dynamically Reconfigurable Middlebox for Network Protection

Chia Yee Ooi, Muhammad N. Marsono, Tze Hon Tan, 2014, 2014 Second International Symposium on Computing and Networking.

Enhanced Functional Fault Model for Micro Operation Faults

Chia Yee Ooi, Hideo Fujiwara, 2010 .

Classification of Trojan Nets Based on SCOAP Values using Supervised Learning

Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

An integrated DFT solution for power reduction in scan test applications by low power gating scan cell

Chia Yee Ooi, Tomokazu Yoneda, Michiko Inoue, 2017, Integr..

rrBox: A remote dynamically reconfigurable network processing middlebox

Chia Yee Ooi, Muhammad N. Marsono, Tze Hon Tan, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Feasible transition path generation for EFSM-based system testing

Chia Yee Ooi, Yuan Wen Hau, Muhammad N. Marsono, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Configurable Version Management Hardware Transactional Memory for Multi-processor Platform

Chia Yee Ooi, Trias Andromeda, Yuan Wen Hau, 2014 .

Classification of Sequential Circuits Based on tauk Notation and Its Applications

Chia Yee Ooi, Hideo Fujiwara, Thomas Clouqueur, 2005, IEICE Trans. Inf. Syst..

Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique

Chia Yee Ooi, Muhammad N. Marsono, Alireza Monemi, 2015, Int. J. Reconfigurable Comput..

Comparative study of electrocardiogram QRS complex detection algorithm on Field Programmable Gate Array platform

Chia Yee Ooi, Yuan Wen Hau, Rabia Bakhteri, 2014, 2014 IEEE Conference on Biomedical Engineering and Sciences (IECBES).

Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms

Chia Yee Ooi, Yuan Wen Hau, Jeevan Sirkunan, 2017, J. Syst. Archit..

Accelerating Extreme Learning Machine on FPGA by Hardware Implementation of Given Rotation - QRD

Chia Yee Ooi, Nordinah Ismail, Chong Yeam Tan, 2019 .

Hardware transactional memory on multi-processor FPGA platform

Chia Yee Ooi, Yuan Wen Hau, Jeevan Sirkunan, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Tongue's substance and coating recognition analysis using HSV color threshold in tongue diagnosis

Chia Yee Ooi, Nur Diyana Kamarudin, Tadaaki Kawanabe, 2016, International Workshop on Pattern Recognition.

A modular architecture for dynamically reconfigurable middlebox with customized reconfiguration handler

Chia Yee Ooi, Muhammad N. Marsono, M. N. Marsono, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

Study on Test Compaction in High-Level Automatic Test Pattern Generation (ATPG) Platform

Chia Yee Ooi, Ayub Chin Abdullah, 2013 .

Use of learning approaches to predict clinical deterioration in patients based on various variables: a review of the literature

Chia Yee Ooi, Yuan Wen Hau, Mehrdad Moghbel, 2021, Artificial Intelligence Review.

Carbon Nanotube Field Effect Transistor (CNTFET) and Resistive Random Access Memory (RRAM) Based Ternary Combinational Logic Circuits

Fawnizu Azmadi Hussin, Chia Yee Ooi, Farooq Ahmad Khanday, 2021, Electronics.

An FPGA-based network system with service-uninterrupted remote functional update

Chia Yee Ooi, Muhammad Nadzir Marsono, M. N. Marsono, 2021 .