Masanori Fukumoto

A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 μA/MB data-retention current

Hiroyuki Yamauchi, Toru Iwata, Akito Uno, 1995, IEEE J. Solid State Circuits.

A Circuit Tee nology for a Self- AM with Less than 0.5 ~A/ etention Current

Hiroyuki Yamauchi, Tsutomu Fujita, Akito Uno, 1995 .

SCC (Surrounded Capacitor Cell) Structure for DRAM

Shinji Odanaka, Toshio Yamada, T. Ohzone, 1987 .

A planarization technology using a bias-deposited dielectric film and an etch-back process

S. Fujii, T. Ohzone, Masanori Fukumoto, 1988 .

Depth Profiles of Boron Atoms with Large Tilt‐Angle Implantations

Shinji Odanaka, Hiroyuki Umimoto, Takashi Ohzone, 1986 .