Emanuele Depaoli

A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication

Simone Erba, Daniele Baldi, Francesco Svelto, 2009, IEEE Journal of Solid-State Circuits.

6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI

Enrico Monaco, Matteo Bassi, Andrea Mazzanti, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR

Simone Erba, Francesco Svelto, Massimo Pozzoni, 2008, 2008 IEEE Custom Integrated Circuits Conference.

A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS

Hongyang Zhang, Andrea Mazzanti, Simone Erba, 2019, IEEE Journal of Solid-State Circuits.

Clock Recovery and Equalization Techniques for Lossy Channels in Multi Gb/s Serial Links

Simone Erba, Daniele Baldi, Francesco Svelto, 2009 .

Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End

Antonio Liscidini, Rinaldo Castello, Emanuele Depaoli, 2006, IEEE Custom Integrated Circuits Conference 2006.

A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS

Hongyang Zhang, Enrico Monaco, Andrea Mazzanti, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).