Matteo Repossi

发表

A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication

Simone Erba, Daniele Baldi, Francesco Svelto, 2009, IEEE Journal of Solid-State Circuits.

22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s

Enrico Temporiti, Daniele Baldi, Francesco Svelto, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

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Matteo Repossi, Giuseppe Cusmail, Guido Gabriele Albasini, 2007 .

A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization

Simone Erba, Daniele Baldi, Francesco Svelto, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies

Enrico Temporiti, Daniele Baldi, Francesco Svelto, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

Demonstration of a Partially Integrated Silicon Photonics ONU in a Self-Coherent Reflective FDMA PON

Roberto Gaudino, Stefano Straullu, Paolo Savio, 2017, Journal of Lightwave Technology.

A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS

Andrea Mazzanti, Francesco Svelto, Matteo Repossi, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

Transmitter Made up of a Silicon Photonic IC and its Flip-Chipped CMOS IC Driver Targeting Implementation in FDMA-PON

Roberto Gaudino, Silvio Abrate, Benjamin Blampey, 2016, Journal of Lightwave Technology.

A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With – 15.2-dBm OMA Sensitivity

Andrea Mazzanti, Enrico Temporiti, Francesco Svelto, 2019, ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC).

A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links

Dan Li, Enrico Temporiti, Daniele Baldi, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A sliding IF receiver for mm-wave WLANs in 65nm CMOS

Davide Guermandi, Andrea Mazzanti, Francesco Svelto, 2009, 2009 IEEE Custom Integrated Circuits Conference.

Clock Recovery and Equalization Techniques for Lossy Channels in Multi Gb/s Serial Links

Simone Erba, Daniele Baldi, Francesco Svelto, 2009 .

A 60GHz receiver with 13GHz bandwidth for Gbit/s wireless links in 65nm CMOS

Davide Guermandi, Andrea Mazzanti, Enrico Temporiti, 2010, 2010 IEEE International Conference on Integrated Circuit Design and Technology.

A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators

Davide Guermandi, Andrea Mazzanti, Enrico Temporiti, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Insights Into Silicon Photonics Mach–Zehnder-Based Optical Transmitter Architectures

Enrico Temporiti, Daniele Baldi, Francesco Svelto, 2016, IEEE Journal of Solid-State Circuits.

23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies

Enrico Temporiti, Daniele Baldi, Francesco Svelto, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

A 3.2-to-7.3GHz Quadrature Oscillator with Magnetic Tuning

Francesco Svelto, Matteo Repossi, Guido Albasini, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

Davide Guermandi, Andrea Mazzanti, Enrico Temporiti, 2011, IEEE Journal of Solid-State Circuits.

Analysis of loss mechanisms in coplanar waveguides integrated on bulk CMOS substrates

Francesco Svelto, Matteo Repossi, Paolo Arcioni, 2009, 2009 European Microwave Conference (EuMC).

A Low-Noise Design Technique for High-Speed CMOS Optical Receivers

Dan Li, Andrea Mazzanti, Enrico Temporiti, 2014, IEEE Journal of Solid-State Circuits.

A fully packaged 25 Gbps/channel WDM photoreceiver module based on a Silicon Photonic Integrated Circuit and a flip-chipped CMOS quad transimpedance amplifier

Benjamin Blampey, Sylvie Menezo, Enrico Temporiti, 2016, 2016 IEEE Optical Interconnects Conference (OI).

Design of Low-Loss Transmission Lines in Scaled CMOS by Accurate Electromagnetic Simulations

Francesco Svelto, Matteo Repossi, Paolo Arcioni, 2009, IEEE Journal of Solid-State Circuits.

A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4

Dan Li, Andrea Mazzanti, Enrico Temporiti, 2012, 2012 Proceedings of the ESSCIRC (ESSCIRC).

A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS

Andrea Mazzanti, Francesco Svelto, Matteo Repossi, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology

Francesco Svelto, Matteo Repossi, Melchiorre Bruccoleri, 2021, IEEE Journal of Solid-State Circuits.