D. Pal

A low-voltage, low-power, high-linearity cmos four-quadrant analog multiplier

A. Demosthenous, C. Sawigun, D. Pal, 2007, 2007 18th European Conference on Circuit Theory and Design.

A low-power CMOS analog voltage buffer using compact adaptive biasing

J. Mahattanakul, A. Demosthenous, C. Sawigun, 2007, 2007 18th European Conference on Circuit Theory and Design.