Andrew B. Kahng

发表

On compensation of systematic manufacturing variations in physical design

Andrew B. Kahng, Puneet Gupta, 2007 .

Guest Editors' Introduction: RTL to GDSII - From Foilware to Standard Practice

Andrew B. Kahng, Dwight D. Hill, 2004, IEEE Des. Test Comput..

Learning-based approximation of interconnect delay and slew in signoff timing tools

Andrew B. Kahng, Seokhyeong Kang, Hyein Lee, 2013, 2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

IncPIRD: Fast Learning-Based Prediction of Incremental IR Drop

Andrew B. Kahng, Chia-Tung Ho, A. Kahng, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A new design cost model for the 2001 ITRS

Andrew B. Kahng, Gary Smith, 2002, Proceedings International Symposium on Quality Electronic Design.

Floorplan evaluation with timing-driven global wireplanning, pin assignment, and buffer/wire sizing

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

Combinatorial group testing methods for the BIST diagnosis problem

Andrew B. Kahng, Sherief Reda, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

Layout-aware scan chain synthesis for improved path delay fault coverage

Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Design for manufacturability: Then and now

Andrew B. Kahng, 2011, IEEE Design & Test of Computers.

The World Map of Integer Programs

Andrew B. Kahng, T. C. Hu, 2016 .

Dimension of the Solution Space

Andrew B. Kahng, T. C. Hu, 2016 .

Line-End Shortening is Not Always a Failure

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Variability

Andrew B. Kahng, A. Kahng, 2002, IEEE Des. Test Comput..

Using Machine Learning to Predict Path-Based Slack from Graph-Based Timing Analysis

Andrew B. Kahng, Uday Mallappa, Lawrence Saul, 2018, 2018 IEEE 36th International Conference on Computer Design (ICCD).

Design Challenges at 65nm and Beyond

Andrew B. Kahng, A. Kahng, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Optimal partitioners and end-case placers for standard-cell layout

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Routing-aware scan chain ordering

Puneet Gupta, Andrew B. Kahng, Stefanus Mantik, 2003, ASP-DAC.

Minimum-buffered routing of non-critical nets for slew rate and reliability control

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

Guest Editor's Introduction: Roadmaps and Visions for Design and Test

Andrew B. Kahng, William H. Joyner, 2001, IEEE Des. Test Comput..

Simultaneous Buffer Insertion and Wire Sizing Considering Systematic CMP Variation and Random Leff Variation

Jinjun Xiong, Andrew B. Kahng, Lei He, 2007, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Design for Variability, Performance, and Yield

Andrew B. Kahng, Anurag Mittal, Ban Wong, 2008 .

Standard cell library optimization for leakage reduction

Puneet Gupta, Andrew B. Kahng, Saumil Shah, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Big Chips

Andrew B. Kahng, Vijayalakshmi Srinivasan, 2011, IEEE Micro.

Design Implementation With Noninteger Multiple-Height Cells for Improved Design Quality in Advanced Nodes

Andrew B. Kahng, Jiajia Li, Sorin Adrian Dobre, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1999, ALENEX.

Efficient heuristics for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design

Jason Cong, Andrew B. Kahng, Kwok-Shing Leung, 1997, ISPD '97.

Optimal partitioners and end-case placers for standard-cell layout

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1999, ISPD '99.

Diffusion break-aware leakage power optimization and detailed placement in sub-10nm VLSI

Andrew B. Kahng, Sun ik Heo, Minsoo Kim, 2019, ASP-DAC.

On-Line Adjustable Buffering for Runtime Power Reduction

Andrew B. Kahng, Puneet Sharma, Sherief Reda, 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

On the intrinsic rent parameter and spectra-based partitioning methodologies

Fadi J. Kurdahi, Andrew B. Kahng, Champaka Ramachandran, 1992, EURO-DAC '92.

Manufacturing-aware physical design

Puneet Gupta, Andrew B. Kahng, A. Kahng, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Revisiting 3DIC Benefit with Multiple Tiers

Andrew B. Kahng, Jiajia Li, Wei-Ting Jonas Chan, 2016, 2016 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Wire swizzling to reduce delay uncertainty due to capacitive coupling

Puneet Gupta, Andrew B. Kahng, 2004, 17th International Conference on VLSI Design. Proceedings..

Proceedings of the 2000 international workshop on System-level interconnect prediction

Andrew B. Kahng, Dirk Stroobandt, Phillip Christie, 2000 .

Efficient Analyses and Models of VLSI and MCM Interconnects

Andrew B. Kahng, Sudhakar Muddu, 1996 .

Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning

Andrew B. Kahng, Xu Xu, A. Kahng, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Provably good global buffering by generalized multiterminalmulticommodity flow approximation

Andrew B. Kahng, Ion I. Mandoiu, Feodor F. Dragan, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

New graph bipartizations for double-exposure, bright field alternating phase-shift mask layout

Andrew B. Kahng, Alex Zelikovsky, Shailesh Vaya, 2001, ASP-DAC '01.

New approaches for placement and benchmarking of cmos and gene chips

Andrew B. Kahng, Sherief Reda, 2006 .

On legalization of row-based placements

Andrew B. Kahng, Igor L. Markov, Sherief Reda, 2004, GLSVLSI '04.

Multiway partitioning via geometric embeddings, orderings, and dynamic programming

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Supply voltage degradation aware analytical placement

Andrew B. Kahng, Bao Liu, Qinke Wang, 2005, 2005 International Conference on Computer Design.

Auxiliary pattern-based optical proximity correction for better printability, timing, and leakage control

Andrew B. Kahng, Chul-Hong Park, Swamy Muddu, 2008 .

Design for Manufacturing

Andrew B. Kahng, A. Kahng, 2004 .

Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees

Derong Liu, Andrew B. Kahng, Charles J. Alpert, 2018, ISPD.

Prim-Dijkstra tradeoffs for improved performance-driven routing tree design

David R. Karger, Andrew B. Kahng, Charles J. Alpert, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Improved a priori interconnect predictions and technology extrapolation in the GTX system

Yu Cao, Dennis Sylvester, Andrew B. Kahng, 2003, IEEE Trans. Very Large Scale Integr. Syst..

Performance- and energy-aware optimization of BEOL interconnect stack geometry in advanced technology nodes

Andrew B. Kahng, Hyein Lee, Lutong Wang, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Copy detection for intellectual property protection of VLSI designs

Miodrag Potkonjak, Darko Kirovski, Andrew B. Kahng, 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

New game, new goal posts: A recent history of timing closure

Andrew B. Kahng, A. Kahng, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Analytical and statistical interconnect delay models for vlsi system design

Andrew B. Kahng, Kei Masuko, Oscar M. Stafsudd, 1997 .

Mobile system considerations for SDRAM interface trends

Andrew B. Kahng, Vaishnav Srinivas, A. Kahng, 2011, International Workshop on System Level Interconnect Prediction.

Design sensitivities to variability: extrapolations and assessments in nanometer VLSI

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2002, 15th Annual IEEE International ASIC/SOC Conference.

Architecture and details of a high quality, large-scale analytical placer

Andrew B. Kahng, Sherief Reda, Qinke Wang, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Optimal phase conflict removal for layout of dark field alternatingphase shifting masks

Andrew B. Kahng, Piotr Berman, Alex Zelikovsky, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Statistical crosstalk aggressor alignment aware interconnect delay calculation

Andrew B. Kahng, Xu Xu, Bao Liu, 2006, SLIP '06.

Improved path clustering for adaptive path-delay testing

Andrew B. Kahng, Tuck-Boon Chan, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Performance-driven global routing for cell based ICs

Jason Cong, Chak-Kuen Wong, Majid Sarrafzadeh, 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

New and improved BIST diagnosis methods from combinatorial Group testing theory

Andrew B. Kahng, Sherief Reda, A. Kahng, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A new methodology for reduced cost of resilience

Andrew B. Kahng, Seokhyeong Kang, Jiajia Li, 2014, GLSVLSI '14.

Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay

Andrew B. Kahng, Chung-Wen Albert Tsao, A. Kahng, 1994, EURO-DAC '94.

DFM in practice: Hit or hype?

Andrew B. Kahng, Juan C. Rey, Robert C. Aitken, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Application-Specific Cross-Layer Optimization Based on Predictive Variable-Latency VLSI Design

Lu Wang, Andrew B. Kahng, Vivek De, 2015, ACM J. Emerg. Technol. Comput. Syst..

"Unobserved Corner" Prediction: Reducing Timing Analysis Effort for Faster Design Convergence in Advanced-Node Design

Andrew B. Kahng, Uday Mallappa, Lawrence Saul, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Implementation and extensibility of an analytic placer

Andrew B. Kahng, Qinke Wang, A. Kahng, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Toward Optimal Routing Trees

Andrew B. Kahng, Gabriel Robins, Kenneth D. Boese, 1993 .

Statistical analysis and modeling for error composition in approximate computation circuits

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Metrics: automatic data collection infrastructure for continuous ic design process improvement

Andrew B. Kahng, Stefanus Mantik, 2003 .

DAC Highlights

Andrew B. Kahng, Grant Martin, A. Kahng, 2005, IEEE Des. Test Comput..

Wiring layer assignments with consistent stage delays

Andrew B. Kahng, Dirk Stroobandt, 2000, SLIP '00.

Filling algorithms and analyses for layout density control

Andrew B. Kahng, Alex Zelikovsky, Gabriel Robins, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

RePlAce: Advancing Solution Quality and Routability Validation in Global Placement

Andrew B. Kahng, Chung-Kuan Cheng, Ilgweon Kang, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

2003 International Workshop on System-Level Interconnect Prediction (SLIP)

Andrew B. Kahng, Dennis S. Sylester, A. Kahng, 2004 .

Wirelength minimization for min-cut placements via placement feedback

Andrew B. Kahng, Sherief Reda, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Effective Iterative Techniques for

Miodrag Potkonjak, Andrew B. Kahng, Hyun-Jin Choi, 2004 .

Bounded-skew clock and Steiner routing under Elmore delay

Jason Cong, Cheng-Kok Koh, Andrew B. Kahng, 1995, ICCAD.

A power-constrained MPU roadmap for the International Technology Roadmap for Semiconductors (ITRS)

Andrew B. Kahng, Kwangok Jeong, A. Kahng, 2009, 2009 International SoC Design Conference (ISOCC).

Tutorial: Open-Source EDA and Machine Learning for IC Design: A Live Update

Andrew B. Kahng, Abdelrahman Hosny, 2020, VLSI Design.

MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts

Andrew B. Kahng, Hyein Lee, Peter Debacker, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Learning-based prediction of embedded memory timing failures during initial floorplan design

Andrew B. Kahng, Kun Young Chung, Siddhartha Nath, 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

Product Futures

Andrew B. Kahng, 2011, IEEE Design & Test of Computers.

Enhanced metamodeling techniques for high-dimensional IC design estimation problems

Andrew B. Kahng, Siddhartha Nath, Bill Lin, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Toward better wireload models in the presence of obstacles

Andrew B. Kahng, Chung-Kuan Cheng, Dirk Stroobandt, 2002, IEEE Trans. Very Large Scale Integr. Syst..

High-Performance Routing Trees with Identified Critical Sinks

Andrew B. Kahng, Gabriel Robins, Kenneth D. Boese, 1993, 30th ACM/IEEE Design Automation Conference.

The T-join Problem in Sparse Graphs: Applications to Phase Assignment Problem in VLSI Mask Layout

Andrew B. Kahng, Piotr Berman, Alex Zelikovsky, 1999, WADS.

On the performance bounds for a class of rectilinear Steiner tree heuristics in arbitrary dimension

Andrew B. Kahng, Gabriel Robins, A. Kahng, 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Detailed Placement for Enhanced Control of Resist and Etch CDs

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An analytic placer for mixed-size placement and timing-driven placement

Andrew B. Kahng, Qinke Wang, 2004, ICCAD 2004.

New analyses of distributed RC interconnections

Andrew B. Kahng, Sudhakar Muddu, S. Muddu, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

A roadmap and vision for physical design

Andrew B. Kahng, 2002, ISPD '02.

Comprehensive optimization of scan chain timing during late-stage IC implementation

Andrew B. Kahng, Kun Young Chung, Jiajia Li, 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Learning-based prediction of package power delivery network quality

Andrew B. Kahng, Yi Cao, Abinash Roy, 2019, ASP-DAC.

Closing the smoothness and uniformity gap in area fill synthesis

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2002, ISPD '02.

Signal and Power Integrity

Andrew B. Kahng, Anurag Mittal, Ban Wong, 2008 .

Quantified Impacts of Guardband Reduction on Design Process Outcomes

Andrew B. Kahng, Kambiz Samadi, Kwangok Jeong, 2008, 9th International Symposium on Quality Electronic Design (isqed 2008).

A global-local optimization framework for simultaneous multi-mode multi-corner clock skew variation reduction

Andrew B. Kahng, Siddhartha Nath, Jiajia Li, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Is nanometer design under control?

Andrew B. Kahng, Bing Shou, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Opportunities in Future Physical Implementation and Manufacturing Handoff Flows

Andrew B. Kahng, 2007 .

Research directions for coevolution of rules and routers

Andrew B. Kahng, A. Kahng, 2003, ISPD '03.

Training minimal artificial neural network architectures for subsoil object detection

Andrew B. Kahng, Kenneth D. Boese, Donald E. Franklin, 1995, Defense, Security, and Sensing.

Evaluation of the new OASIS format for layout fill compression

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

Old Bachelor Acceptance: A New Class of Non-Monotone Threshold Accepting Methods

Andrew B. Kahng, T. C. Hu, Chung-Wen Albert Tsao, 1995, INFORMS J. Comput..

Timing margin recovery with flexible flip-flop timing model

Andrew B. Kahng, Hyein Lee, 2014, Fifteenth International Symposium on Quality Electronic Design.

Nano-CMOS Design for Manufacturabililty

Andrew B. Kahng, Anurag Mittal, Victor Moroz, 2008 .

Eyecharts: Constructive benchmarking of gate sizing heuristics

Puneet Gupta, Andrew B. Kahng, Puneet Sharma, 2010, Design Automation Conference.

Relaxed partitioning balance constraints in top-down placement

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 1998, Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372).

Synthesis and Analysis of Design-Dependent Ring Oscillator (DDRO) Performance Monitors

Puneet Gupta, Andrew B. Kahng, Tuck-Boon Chan, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Intrinsic shortest path length: a new, accurate a priori wirelength estimator

Andrew B. Kahng, Sherief Reda, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

More realistic power grid verification based on hierarchical current and power constraints

Ngai Wong, Andrew B. Kahng, Chung-Kuan Cheng, 2011, ISPD '11.

Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography

Andrew B. Kahng, Mohit Gupta, Kwangok Jeong, 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

Requirements for models of achievable routing

Andrew B. Kahng, Dirk Stroobandt, Stefanus Mantik, 2000, ISPD '00.

Selective gate-length biasing for cost-effective runtime leakage control

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2004, Proceedings. 41st Design Automation Conference, 2004..

CACTI-IO: CACTI With OFF-Chip Power-Area-Timing Models

Andrew B. Kahng, Norman P. Jouppi, Naveen Muralimanohar, 2015, IEEE Trans. Very Large Scale Integr. Syst..

Slack redistribution for graceful degradation under voltage overscaling

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Improved signoff methodology with tightened BEOL corners

Andrew B. Kahng, Tuck-Boon Chan, Sorin Dobre, 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

Improved flop tray-based design implementation for power reduction

Andrew B. Kahng, Jiajia Li, Lutong Wang, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Cooperative Mobile Robotics: Antecedents and Directions

Andrew B. Kahng, Alex S. Fukunaga, Y. Uny Cao, 1997, Auton. Robots.

Futures for partitioning in physical design (tutorial)

Andrew B. Kahng, A. Kahng, 1998, ISPD '98.

Random structure of error surfaces: toward new stochastic learning methods

Andrew B. Kahng, 1992, Defense, Security, and Sensing.

Interconnect tuning strategies for high-performance ICs

Andrew B. Kahng, Sudhakar Muddu, Rahul Sharma, 1998, DATE.

Guest Editorial: Alternative Computing and Machine Learning for Internet of Things

Jan M. Rabaey, Farshad Firouzi, Bahar Farahani, 2017, IEEE Trans. Very Large Scale Integr. Syst..

The ITRS MPU and SOC system drivers: Calibration and implications for design-based equivalent scaling in the roadmap

Andrew B. Kahng, Siddhartha Nath, Wei-Ting Jonas Chan, 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

Effective iterative techniques for fingerprinting design IP

Miodrag Potkonjak, Gang Qu, Andrew B. Kahng, 2004, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

An analytic placer for mixed-size placement and timing-driven placement

Andrew B. Kahng, Qinke Wang, A. Kahng, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

The ITRS design technology and system drivers roadmap: Process and status

Andrew B. Kahng, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

INVITED: Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project

Andrew B. Kahng, Mateus Fogaça, Sachin S. Sapatnekar, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Interconnect Matching Design Rule Inferring and Optimization through Correlation Extraction

Andrew B. Kahng, Rasit Onur Topaloglu, 2006, 2006 International Conference on Computer Design.

Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10 nm VLSI

Andrew B. Kahng, Lutong Wang, Bangqi Xu, 2019, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

How to get real mad

Andrew B. Kahng, 2008, ISPD '08.

3DIC benefit estimation and implementation guidance from 2DIC implementation

Andrew B. Kahng, Siddhartha Nath, Kambiz Samadi, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Hypergraph partitioning with fixed vertices

Andrew B. Kahng, Andrew E. Caldwell, Igor L. Markov, 1999, DAC '99.

An effective analog approach to Steiner routing

Andrew B. Kahng, A. Kahng, 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

A general framework for vertex orderings, with applications to netlist clustering

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1994, ICCAD '94.

Toward effective utilization of timing exceptions in design optimization

Andrew B. Kahng, Seokhyeong Kang, Kwangok Jeong, 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

SSTA-SI: Statistical Static Timing Analysis in the Presence of Signal Integrity Effects

Andrew B. Kahng, Xu Xu, Bao Liu, 2006 .

Optimal Scheduling and Allocation for IC Design Management and Cost Reduction

Andrew B. Kahng, Siddhartha Nath, Biswadeep Chatterjee, 2017, ACM Trans. Design Autom. Electr. Syst..

Analysis and justification of a simple, practical 2 1/2-D capacitance extraction methodology

Jason Cong, Andrew B. Kahng, Lei He, 1997, DAC.

Improved algorithms for hypergraph bipartitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, ASP-DAC '00.

Linear and Integer Programming in Practice

Andrew B. Kahng, T. C. Hu, 2016 .

Monte-Carlo algorithms for layout density control

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2000, ASP-DAC '00.

A layout advisor for timing-critical bus routing

Andrew B. Kahng, Wei Huang, 1997, Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334).

Efficient design and analysis of robust power distribution meshes

Puneet Gupta, Andrew B. Kahng, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

On the skew-bounded minimum-buffer routing tree problem

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

An improved graph-based FPGA technology mapping algorithm for delay optimization

Jason Cong, Andrew B. Kahng, Kuang-Chien Chen, 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

Optimal robust path planning in general environments

Andrew B. Kahng, Gabriel Robins, T. C. Hu, 1993, IEEE Trans. Robotics Autom..

Improving OPC quality via interactions within the design-to-manufacturing flow (Invited Paper)

Puneet Gupta, Andrew B. Kahng, C.-H. Park, 2005, Photomask Japan.

Heuristic Methods for Fine-Grain Exploitation of FDSOI

Andrew B. Kahng, Hyein Lee, Hamed Fatemi, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Defocus-Aware Leakage Estimation and Control

Andrew B. Kahng, Puneet Sharma, Swamy Muddu, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router

Andrew B. Kahng, Hyein Lee, Kwangsoo Han, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Gate-length biasing for runtime-leakage control

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

When is 3D 2B?

Andrew B. Kahng, 2010, IEEE Des. Test Comput..

Engineering a scalable placement heuristic for DNA probe arrays

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, RECOMB '03.

Revised Simplex Method

Andrew B. Kahng, T. C. Hu, 2016 .

Provably good performance-driven global routing

Jason Cong, Chak-Kuen Wong, Majid Sarrafzadeh, 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Study of floating fill impact on interconnect capacitance

Andrew B. Kahng, Puneet Sharma, Kambiz Samadi, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

Delay models for MCM interconnects when response is nonmonotone

Andrew B. Kahng, Sudhakar Muddu, Kei Masuko, 1997, Proceedings 1997 IEEE Multi-Chip Module Conference.

SI for free: machine learning of interconnect coupling delay and transition effects

Andrew B. Kahng, Siddhartha Nath, Mulong Luo, 2015, 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Partitioning with terminals: a “new” problem and new benchmarks

Andrew B. Kahng, Igor L. Markov, Charles J. Alpert, 1999, ISPD '99.

Enhancing sensitivity-based power reduction for an industry IC design context

Andrew B. Kahng, Jose Pineda de Gyvez, Jiajia Li, 2019, Integr..

Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning Lithography

Andrew B. Kahng, Mohit Gupta, Kwangok Jeong, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Interconnect modeling for improved system-level design optimization

Luca P. Carloni, Andrew B. Kahng, Puneet Sharma, 2008, 2008 Asia and South Pacific Design Automation Conference.

Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems

Andrew B. Kahng, Ajay Joshi, Warren Jin, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Delay analysis of coupled transmission lines

Andrew B. Kahng, Sudhakar Muddu, 1996, Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems.

Session details: Session 5: Benchmarking

Andrew B. Kahng, 2003, ISPD '03.

Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Mission profile aware IC design — A case study

Andrew B. Kahng, Göran Jerke, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Watermarking techniques for intellectual property protection

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Impact of adaptive voltage scaling on aging-aware signoff

Andrew B. Kahng, Tuck-Boon Chan, Wei-Ting Jonas Chan, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

An Analytical Delay Model for Interconnects

Andrew B. Kahng, Sudhakar Muddu, A. Kahng, 1997 .

A system for automatic recording and prediction of design quality metrics

Andrew B. Kahng, Stefanus Mantik, A. Kahng, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

Quantified Suboptimality of VLSI Layout Heuristics

Andrew B. Kahng, Dennis J.-H. Huang, Lars W. Hagen, 1995, 32nd Design Automation Conference.

Resist heating dependence on subfield scheduling in 50-kV electron beam maskmaking

Andrew B. Kahng, Ion I. Mandoiu, Sergey V. Babin, 2003, Photomask Japan.

Scaling: More than Moore's law

Andrew B. Kahng, A. Kahng, 2010, IEEE Design & Test of Computers.

Construction of realistic gate sizing benchmarks with known optimal solutions

Andrew B. Kahng, Seokhyeong Kang, 2012, ISPD '12.

Bringing down NRE

Andrew B. Kahng, 2003, IEEE Des. Test Comput..

Impact of interoperability on CAD-IP reuse: an academic viewpoint

Andrew B. Kahng, Igor L. Markov, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

Practical Approximations of Steiner Trees in Uniform Orientation Metrics

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2018, Handbook of Approximation Algorithms and Metaheuristics.

Optimizing stochastic circuits for accuracy-energy tradeoffs

John P. Hayes, Andrew B. Kahng, Armin Alaghi, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Incremental Multiple-Scan Chain Ordering for ECO Flip-Flop insertion

Andrew B. Kahng, Siddhartha Nath, Ilgweon Kang, 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Toward More Powerful Recombinations

Andrew B. Kahng, Byung Ro Moon, A. Kahng, 1995, ICGA.

A new class of iterative Steiner tree heuristics with good performance

Andrew B. Kahng, Gabriel Robins, A. Kahng, 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Two-pole analysis of interconnection trees

Andrew B. Kahng, Sudhakar Muddu, A. Kahng, 1995, Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95).

Multi-project reticle floorplanning and wafer dicing

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2004, ISPD '04.

Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power

Andrew B. Kahng, Hailong Yao, Chul-Hong Park, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A semi-persistent clustering technique for VLSI circuit placement

Andrew B. Kahng, Gi-Joon Nam, Charles J. Alpert, 2005, ISPD '05.

Minimum implant area-aware gate sizing and placement

Andrew B. Kahng, Hyein Lee, 2014, GLSVLSI '14.

Recent directions in netlist partitioning: a survey

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1995, Integr..

Combinatorial group testing methods for the BIST diagnosis problem

Andrew B. Kahng, Sherief Reda, 2004 .

Filling and slotting: analysis and algorithms

Andrew B. Kahng, Alex Zelikovsky, Gabriel Robins, 1997, ISPD '98.

MAPG: Memory access power gating

Andrew B. Kahng, Tajana Simunic, Seokhyeong Kang, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Geometric Embeddings for Faster and Better Multi-Way Netlist Partitioning

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1993, 30th ACM/IEEE Design Automation Conference.

Design Metrics to Achieve Design Quality

Andrew B. Kahng, Ronald Collett, Ton. H. van de Kraats, 2001, IEEE International Symposium on Quality Electronic Design.

Panel: Is Nanometer Design Under Control?

Andrew B. Kahng, Shekhar Y. Borkar, John M. Cohn, 2001, DAC.

CACTI-IO: CACTI with off-chip power-area-timing models

Andrew B. Kahng, Norman P. Jouppi, Naveen Muralimanohar, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Zero-skew clock routing trees with minimum wirelength

Andrew B. Kahng, Kenneth D. Boese, A. Kahng, 1992, [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit.

INVITED: Reducing Time and Effort in IC Implementation: A Roadmap of Challenges and Solutions

Andrew B. Kahng, A. Kahng, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield

Andrew B. Kahng, Jiang Hu, Ganesh Venkataraman, 2007, 2007 Asia and South Pacific Design Automation Conference.

A tale of two nets: studies of wirelength progression in physical design

Andrew B. Kahng, Sherief Reda, A. Kahng, 2006, SLIP '06.

Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction

Andrew B. Kahng, Alex Zelikovsky, Subarna Sinha, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Benchmarking of Mask Fracturing Heuristics

Andrew B. Kahng, Tuck-Boon Chan, Abde Ali Kagalwalla, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A faster implementation of APlace

Andrew B. Kahng, Qinke Wang, A. Kahng, 2006, ISPD '06.

Reducing time and effort in IC implementation: a roadmap of challenges and solutions

Andrew B. Kahng, 2018, DAC 2018.

ORION3.0: A Comprehensive NoC Router Estimation Tool

Andrew B. Kahng, Siddhartha Nath, Bill Lin, 2015, IEEE Embedded Systems Letters.

Compression algorithms for dummy-fill VLSI layout data

Andrew B. Kahng, Robert B. Ellis, Yuhong Zheng, 2003, SPIE Advanced Lithography.

Defocus-Aware Leakage Estimation and Control

Andrew B. Kahng, Puneet Sharma, Swamy Muddu, 2008, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A proposal for routing-based timing-driven scan chain ordering

Puneet Gupta, Andrew B. Kahng, Stefanus Mantik, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

A novel metric for interconnect architecture performance

Andrew B. Kahng, Parthasarathi Dasgupta, Swamy Muddu, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Wafer Topography-Aware Optical Proximity Correction

Puneet Gupta, Andrew B. Kahng, Kambiz Samadi, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Electrical assessment of lithographic gate line-end patterning

Andrew B. Kahng, Puneet Gupta, Chul-Hong Park, 2010 .

Monte-Carlo methods for chemical-mechanical planarization on multiple-layer and dual-material models

Alexander Zelikovsky, Andrew B. Kahng, Yu Chen, 2002, SPIE Advanced Lithography.

Scalable Heuristics for Design of DNA Probe Arrays

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2004, J. Comput. Biol..

A deep learning methodology to proliferate golden signoff timing

Andrew B. Kahng, Siddhartha Nath, Seung-Soo Han, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Partitioning-based standard-cell global placement with an exact objective

Andrew B. Kahng, Dennis J.-H. Huang, A. Kahng, 1997, ISPD '97.

Analysis and modeling of vlsi interconnections

Andrew B. Kahng, Sudhakar Muddu, 1996 .

Constructing current-based gate models based on existing timing library

Andrew B. Kahng, Xu Xu, Bao Liu, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

On the relevance of wire load models

Andrew B. Kahng, Stefanus Mantik, Kenneth D. Boese, 2001, SLIP '01.

Estimation of wirelength reduction for λ-geometry vs. manhattan placement and routing

Andrew B. Kahng, Ion I. Mandoiu, Chung-Kuan Cheng, 2003, SLIP '03.

Column Generating Technique

Andrew B. Kahng, T. C. Hu, 2016 .

Detailed placement for leakage reduction using systematic through-pitch variation

Andrew B. Kahng, Puneet Sharma, Swamy Muddu, 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

On High-Speed VLSI Interconnects: Analysis and Design

Jason Cong, Andrew B. Kahng, Kwok-Shing Leung, 1992 .

When clusters meet partitions: new density-based methods for circuit decomposition

Andrew B. Kahng, Dennis J.-H. Huang, A. Kahng, 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

Multicommodity Flow Algorithms for Buffered Global Routing pdf

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2007, Handbook of Approximation Algorithms and Metaheuristics.

Function smoothing with applications to VLSI layout

Andrew B. Kahng, Igor L. Markov, Andrew A. Kennings, 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

Timing-driven Steiner trees are (practically) free

Andrew B. Kahng, Charles J. Alpert, Cliff C. N. Sze, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Placement feedback: a concept and method for better min-cut placements

Andrew B. Kahng, Sherief Reda, 2004, Proceedings. 41st Design Automation Conference, 2004..

Machine Learning Applications in Physical Design: Recent Results and Directions

Andrew B. Kahng, A. Kahng, 2018, ISPD.

A General Framework For Vertex Orderings, With Applications To Netlist Clustering

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1994, IEEE/ACM International Conference on Computer-Aided Design.

The Y architecture for on-chip interconnect: analysis and methodology

Andrew B. Kahng, Ion I. Mandoiu, Chung-Kuan Cheng, 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Every Tree is Graceful (But Some are More Graceful than Others)

Andrew B. Kahng, T. C. Hu, 1990, Applied Geometry And Discrete Mathematics.

Nano‐CMOS Design Tools: Beyond Model‐Based Analysis and Correction

Andrew B. Kahng, Anurag Mittal, Victor Moroz, 2008 .

Design of integrated-circuit interconnects with accurate modeling of chemical-mechanical planarization

Jinjun Xiong, Andrew B. Kahng, Lei He, 2005, SPIE Advanced Lithography.

Active-mode leakage reduction with data-retained power gating

Andrew B. Kahng, Seokhyeong Kang, Bongil Park, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Study of Optimal Cost-Skew Tradeoff and Remaining Suboptimality in Interconnect Tree Constructions

Andrew B. Kahng, Alex Zelikovsky, Kwangsoo Han, 2018, 2018 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

NOLO: A no-loop, predictive useful skew methodology for improved timing in IC implementation

Andrew B. Kahng, Jiajia Li, Tuck-Boon Chan, 2014, Fifteenth International Symposium on Quality Electronic Design.

Tunable sensors for process-aware voltage scaling

Andrew B. Kahng, Tuck-Boon Chan, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Evolving EDA beyond its E-roots: An overview

Andrew B. Kahng, Farinaz Koushanfar, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Large-step Markov chain variants for VLSI netlist partitioning

Alex Fukunaga, Andrew B. Kahng, D.J.-H. Huang, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

High-dimensional metamodeling for prediction of clock tree synthesis outcomes

Andrew B. Kahng, Siddhartha Nath, Bill Lin, 2013, 2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Random walks for circuit clustering

Jason Cong, Andrew B. Kahng, L. Hagen, 1991, [1991] Proceedings Fourth Annual IEEE International ASIC Conference and Exhibit.

Efficient decoupling capacitor planning via convex programming methods

Sheldon X.-D. Tan, Andrew B. Kahng, Bao Liu, 2006, ISPD '06.

Power-aware placement

Andrew B. Kahng, Sherief Reda, Yongseok Cheon, 2005, Proceedings. 42nd Design Automation Conference, 2005..

DAG-Map: graph-based FPGA technology mapping for delay optimization

Jason Cong, Andrew B. Kahng, Kuang-Chien Chen, 1992, IEEE Design & Test of Computers.

Analytical methods for vlsi module placement

Andrew B. Kahng, Qinke Wang, 2006 .

Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs

Pierre G. Paulin, Andrew B. Kahng, John M. Cohn, 2007, IEEE Des. Test Comput..

DDRO: A novel performance monitoring methodology based on design-dependent ring oscillators

Puneet Gupta, Andrew B. Kahng, Tuck-Boon Chan, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

IC layout and manufacturability: critical links and design flow implications

Andrew B. Kahng, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Minimum Density Interconneciton Trees

Jason Cong, Majid Sarrafzadeh, Andrew B. Kahng, 1993, ISCAS.

Intelligent fill pattern and extraction methodology for sensitive RF/analog or SoC products

Andrew B. Kahng, A. Balasinski, J. Cetin, 2007, SPIE Advanced Lithography.

New techniques for standard-cell placement

Andrew B. Kahng, Dennis J.-H. Huang, 1997 .

Min-max placement for large-scale timing optimization

Andrew B. Kahng, Igor L. Markov, Stefanus Mantik, 2002, ISPD '02.

Logic Design Partitioning for Stacked Power Domains

Andrew B. Kahng, Jiajia Li, Ajay Kapoor, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Digital Layout — Placement

Andrew B. Kahng, Sherief Reda, 2018 .

Planar-DME: a single-layer zero-skew clock tree router

Andrew B. Kahng, Chung-Wen Albert Tsao, A. Kahng, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

CMP Fill Synthesis

Andrew B. Kahng, Kambiz Samadi, A. Kahng, 2008, Handbook of Algorithms for Physical Design Automation.

Highly scalable algorithms for rectilinear and octilinear Steiner trees

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, ASP-DAC '03.

A hybrid multilevel/genetic approach for circuit partitioning

Andrew B. Kahng, Charles J. Alpert, L. Hagen, 1996, Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems.

A fast hierarchical quadratic placement algorithm

Andrew B. Kahng, Gi-Joon Nam, Charles J. Alpert, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Lens aberration aware placement for timing yield

Andrew B. Kahng, Puneet Sharma, Chul-Hong Park, 2009, TODE.

Hierarchical dummy fill for process uniformity

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2001, ASP-DAC '01.

Minimum buffered routing with bounded capacitive load for slew rate and reliability control

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning

Andrew B. Kahng, Xu Xu, A. Kahng, 2003, ISPD '03.

Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation

Andrew B. Kahng, José L. Abellán, Ajay Joshi, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

How much variability can designers tolerate?

Andrew B. Kahng, 2003, IEEE Design & Test of Computers.

Layout Decomposition Approaches for Double Patterning Lithography

Andrew B. Kahng, Hailong Yao, Chul-Hong Park, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Space-filling curve techniques for CAD/CAM

Andrew B. Kahng, 1989 .

32nm 1-D regular pitch SRAM bitcell design for interference-assisted lithography

Andrew B. Kahng, Robert T. Greenway, Chul-Hong Park, 2008, Photomask Technology.

Yield- and cost-driven fracturing for variable shaped-beam mask writing

Andrew B. Kahng, Alex Zelikovsky, Xu Xu, 2004, SPIE Photomask Technology.

Layout density control for improved vlsi manufacturability

Yu Chen, Andrew B. Kahng, 2003 .

TritonRoute: An Initial Detailed Router for Advanced VLSI Technologies

Andrew B. Kahng, Lutong Wang, Bangqi Xu, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Multilevel circuit partitioning

Andrew B. Kahng, Charles J. Alpert, Dennis J.-H. Huang, 1997, DAC.

EDA meets.COM (panel session): how E-services will change the EDA business model

Andrew B. Kahng, Tom Quan, Jennifer Smith, 2000, DAC.

Smart non-default routing for clock power reduction

Andrew B. Kahng, Seokhyeong Kang, Hyein Lee, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

DATC RDF-2019: Towards a Complete Academic Reference Design Flow

Yih-Lang Li, Andrew B. Kahng, Jianli Chen, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Studies of Clustering Objectives and Heuristics for Improved Standard-Cell Placement

Andrew B. Kahng, Rahul Sharma, A. Kahng, 1997 .

Optimization of overdrive signoff

Andrew B. Kahng, Siddhartha Nath, Jiajia Li, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Combining problem reduction and adaptive multistart: a new technique for superior iterative partitioning

Andrew B. Kahng, Lars W. Hagen, A. Kahng, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Nontree routing for reliability and yield improvement [IC layout]

Andrew B. Kahng, Ion I. Mandoiu, Bao Liu, 2004, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Toward a methodology for manufacturability-driven design rule exploration

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2004, Proceedings. 41st Design Automation Conference, 2004..

Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph

Andrew B. Kahng, Chung-Kuan Cheng, Peng Du, 2012, ISPD '12.

Interference assisted lithography for patterning of 1D gridded design

Michael C. Smayling, Andrew B. Kahng, Robert T. Greenway, 2009, Advanced Lithography.

Evaluation of placement techniques for DNA probe array layout

Andrew B. Kahng, Sherief Reda, Xu Xu, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Wot the L: Analysis of Real versus Random Placed Nets, and Implications for Steiner Tree Heuristics

Andrew B. Kahng, Lutong Wang, Sriram Venkatesh, 2018, ISPD.

Design and implementation of move-based heuristics for VLSI hypergraph partitioning

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, JEAL.

Recovery-driven design: A power minimization methodology for error-tolerant processor modules

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2010, Design Automation Conference.

Roadmapping Power

Andrew B. Kahng, 2011, IEEE Design & Test of Computers.

Floorplan and placement methodology for improved energy reduction in stacked power-domain design

Andrew B. Kahng, Jiajia Li, Ajay Kapoor, 2017, 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC).

Scalable detailed placement legalization for complex sub-14nm constraints

Andrew B. Kahng, Hyein Lee, Kwangsoo Han, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Reliability-constrained die stacking order in 3DICs under manufacturing variability

Andrew B. Kahng, Jiajia Li, Tuck-Boon Chan, 2013, International Symposium on Quality Electronic Design (ISQED).

Analytical thermal placement for VLSI lifetime improvement and minimum performance variation

Wei Li, Sung-Mo Kang, Andrew B. Kahng, 2007, 2007 25th International Conference on Computer Design.

Assessing chip-level impact of double patterning lithography

Andrew B. Kahng, Rasit Onur Topaloglu, Kwangok Jeong, 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

Vertical M1 routing-aware detailed placement for congestion and wirelength reduction in sub-10nm nodes

Andrew B. Kahng, Hyein Lee, Peter Debacker, 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap

Andrew B. Kahng, Siddhartha Nath, Wei-Ting Jonas Chan, 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

Toward PDN resource estimation: A law of general power density

Andrew B. Kahng, Kwangok Jeong, 2011, International Workshop on System Level Interconnect Prediction.

On mismatches between incremental optimizers and instance perturbations in physical design tools

Andrew B. Kahng, Stefanus Mantik, A. Kahng, 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

Generation of design guarantees for interconnect matching

Andrew B. Kahng, Rasit Onur Topaloglu, 2006, SLIP '06.

Roads not taken

Andrew B. Kahng, 2011, IEEE Design & Test of Computers.

Characterization, modeling and optimization of fills and stress in semiconductor integrated circuits

Andrew B. Kahng, Rasit O. Topaloglu, 2008 .

Fidelity and near-optimality of Elmore-based routing constructions

Andrew B. Kahng, Gabriel Robins, Kenneth D. Boese, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

GTX: the MARCO GSRC technology extrapolation system

Yu Cao, Dennis Sylvester, Andrew B. Kahng, 2000, Proceedings 37th Design Automation Conference.

Subwavelength lithography and its potential impact on design and EDA

Andrew B. Kahng, Y. C. Pati, 1999, DAC '99.

Netlist and System Partitioning

Andrew B. Kahng, Igor L. Markov, Jens Lienig, 2011 .

Practical Approximation Algorithms for Separable Packing Linear Programs

Andrew B. Kahng, Ion I. Mandoiu, Feodor F. Dragan, 2001, WADS.

A new class of Steiner tree heuristics with good performance: the iterated 1-Steiner approach

Andrew B. Kahng, Gabriel Robins, A. Kahng, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Vlsi interconnect synthesis and prediction

Andrew B. Kahng, Bao Liu, 2003 .

A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances

Andrew B. Kahng, Rasit Onur Topaloglu, A. Kahng, 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

Power Delivery Pathfinding for Emerging Die-to-Wafer Integration Technology

Andrew B. Kahng, Seungwon Kim, Kambiz Samadi, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Practical Bounded-Skew Clock Routing

Andrew B. Kahng, Chung-Wen Albert Tsao, A. Kahng, 1997, J. VLSI Signal Process..

APlace: a general analytic placement framework

Andrew B. Kahng, Sherief Reda, Qinke Wang, 2005, ISPD '05.

Boosting: min-cut placement with improved signal delay

Andrew B. Kahng, Igor L. Markov, Sherief Reda, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Wafer topography-aware optical proximity correction for better DOF margin and CD control

Puneet Gupta, Andrew B. Kahng, Kambiz Samadi, 2005, Photomask Japan.

Is nanometer design under control? (panel session)

Andrew B. Kahng, Shekhar Borkar, Nancy Nettleton, 2001, DAC '01.

CACTI 7

Andrew B. Kahng, Rajeev Balasubramonian, Naveen Muralimanohar, 2017, ACM Trans. Archit. Code Optim..

New efficient algorithms for computing effective capacitance

Andrew B. Kahng, Sudhakar Muddu, 1998, ISPD '98.

ILP-based co-optimization of cut mask layout, dummy fill, and timing for sub-14nm BEOL technology

Andrew B. Kahng, Hyein Lee, Lutong Wang, 2015, SPIE Photomask Technology.

Tuning Strategies for Global Interconnects in High-Performance Deep-Submicron ICs

Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, 1999, VLSI Design.

TAP: token-based adaptive power gating

Andrew B. Kahng, Tajana Simunic, Seokhyeong Kang, 2012, ISLPED '12.

Proceedings of the 1997 International Symposium on Physical Design, ISPD 1997, Napa Valley, California, USA, April 14-16, 1997

Majid Sarrafzadeh, Andrew B. Kahng, A. Kahng, 1997, ISPD.

CAD Challenges for Leading-Edge Multimedia Designs

Andrew B. Kahng, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Admissibility Proofs for the LCS* Algorithm

Andrew B. Kahng, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis, 2000, IBERAMIA-SBIA.

An analytical delay model for RLC interconnects

Andrew B. Kahng, Swamy Muddu, A. Kahng, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

A general framework for multi-flow multi-layer multi-project reticles design

Andrew B. Kahng, Xu Xu, 2006, SPIE Photomask Technology.

Stability and scalability in global routing

Andrew B. Kahng, Kwangok Jeong, Jingwei Lu, 2011, International Workshop on System Level Interconnect Prediction.

Statistical gate delay calculation with crosstalk alignment consideration

Andrew B. Kahng, Xu Xu, Bao Liu, 2006, GLSVLSI '06.

Optimal multi-row detailed placement for yield and model-hardware correlation improvements in sub-10nm VLSI

Andrew B. Kahng, Hyein Lee, Lutong Wang, 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Multi-product floorplan and uncore design framework for chip multiprocessors

Andrew B. Kahng, Ümit Y. Ogras, Michael Kishinevsky, 2015, 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Spectral Partitioning with Multiple Eigenvectors

Andrew B. Kahng, Charles J. Alpert, So-Zen Yao, 1999, Discret. Appl. Math..

Toward performance-driven reduction of the cost of RET-based lithography control

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2003, SPIE Advanced Lithography.

Accurate Predictive Interconnect Modeling for System-Level Design

Luca P. Carloni, Andrew B. Kahng, Puneet Sharma, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Lithography simulation-based full-chip design analyses

Puneet Gupta, Andrew B. Kahng, Sam Nakagawa, 2006, SPIE Advanced Lithography.

Effective iterative techniques for fingerprinting design IP

Miodrag Potkonjak, Gang Qu, Andrew B. Kahng, 1999, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Methodology from chaos in IC implementation

Andrew B. Kahng, Kwangok Jeong, 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

Subwavelength Lithography: How Will It Affect Your Design Flow? (Panel).

Andrew B. Kahng, Y. C. Pati, Lance A. Glasser, 1999, DAC 1999.

RedCooper: Hardware Sensor Enabled Variability Software Testbed for Lifetime Energy Constrained Application

Puneet Gupta, Mani Srivastava, Dennis Sylvester, 2014 .

Fast Hypergraph Partition

Andrew B. Kahng, 1989, 26th ACM/IEEE Design Automation Conference.

Cooperative mobile robotics: antecedents and directions

Alex Fukunaga, Andrew B. Kahng, Y. U. Cao, 1995 .

Area fill synthesis for uniform layout density

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Clock clustering and IO optimization for 3D integration

Andrew B. Kahng, Kwangsoo Han, Vaishnav Srinivas, 2015, 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

for Delay Optimization

Jason Cong, Andrew B. Kahng, Los Angeles, 1992 .

Toward CAD-IP Reuse: The MARCO GSRC Bookshelf of Fundamental CAD Algorithms

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2002 .

APlace: A High Quality, Large-Scale Analytical Placer

Andrew B. Kahng, Sherief Reda, Qinke Wang, 2007, Modern Circuit Placement.

Optimizations of manufacturability and manufacturing in nanometer-era vlsi

Andrew B. Kahng, Xu Xu, 2006 .

More practical bounded-skew clock routing

Andrew B. Kahng, Chung-Wen Albert Tsao, 1997, DAC.

Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An analytical delay model for RLC interconnects

Andrew B. Kahng, Sudhakar Muddu, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Exploiting STI stress for performance

Andrew B. Kahng, Puneet Sharma, Rasit O. Topaloglu, 2007, ICCAD 2007.

Distributed sensing and probing with multiple search agents: toward system-level landmine detection solutions

Andrew B. Kahng, Donald E. Franklin, M. Anthony Lewis, 1995, Defense, Security, and Sensing.

Automated layout and phase assignment techniques for dark-field alternating PSM

Alexander Zelikovsky, Andrew B. Kahng, Huijuan Wang, 1998, Photomask Technology.

Post-routing back-end-of-line layout optimization for improved time-dependent dielectric breakdown reliability

Andrew B. Kahng, Tuck-Boon Chan, 2013, Advanced Lithography.

Explicit modeling of control and data for improved NoC router estimation

Andrew B. Kahng, Siddhartha Nath, Bill Lin, 2012, DAC Design Automation Conference 2012.

The Significance of Packaging

Andrew B. Kahng, 2002 .

Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI

Andrew B. Kahng, Sun ik Heo, Lutong Wang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Self-compensating design for focus variation

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Auxiliary pattern for cell-based OPC

Andrew B. Kahng, Chul-Hong Park, 2006, SPIE Photomask Technology.

Optimal phase conflict removal for layout of dark field alternating phase shifting masks

Andrew B. Kahng, Piotr Berman, Alex Zelikovsky, 1999, ISPD '99.

Efficient gate delay modeling for large interconnect loads

Andrew B. Kahng, Sudhakar Muddu, A. Kahng, 1996, Proceedings 1996 IEEE Multi-Chip Module Conference (Cat. No.96CH35893).

Influence of Professor T. C. Hu's Works on Fundamental Approaches in Layout

Andrew B. Kahng, A. Kahng, 2018, ISPD.

Area fill generation with inherent data volume reduction

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

New spectral methods for ratio cut partitioning and clustering

Andrew B. Kahng, Lars W. Hagen, A. Kahng, 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Best-so-far vs. where-you-are: New perspectives on simulated annealing for CAD

Andrew B. Kahng, Chung-Wen Albert Tsao, Kenneth D. Boese, 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

Fast and efficient phase conflict detection and correction in standard-cell layouts

Andrew B. Kahng, Subarna Sinha, Charles C. Chiang, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Practical iterated fill synthesis for CMP uniformity

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2000, DAC.

Faster minimization of linear wirelength for global placement

Andrew B. Kahng, Igor L. Markov, Tony F. Chan, 1997, ISPD '97.

OCV-aware top-level clock tree optimization

Andrew B. Kahng, Jae-Gon Lee, Siddhartha Nath, 2014, GLSVLSI '14.

Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning

Andrew B. Kahng, Pei-Hsin Ho, Prashant Saxena, 2017, ISPD.

Top-down timing-driven placement with direct minimization of maximal signal delay

Andrew B. Kahng, Igor L. Markov, 2001 .

On wirelength estimations for row-based placement

Andrew B. Kahng, Igor L. Markov, Alex Zelikovsky, 1998, ISPD '98.

CACTI-IO Technical Report

Andrew B. Kahng, Norman P. Jouppi, Naveen Muralimanohar, 2012 .

Modeling the future of semiconductors (and test!)

Andrew B. Kahng, 2015, ITC.

Detailed placement for improved depth of focus and CD control

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2005, ASP-DAC.

Modeling edge placement error distribution in standard cell library

Puneet Gupta, Andrew B. Kahng, Sam Nakagawa, 2006, SPIE Advanced Lithography.

Evaluation of placement techniques for DNA probe array layout

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

On wirelength estimations for row-based placement

Andrew B. Kahng, Igor L. Markov, Alex Zelikovsky, 1998, ISPD '98.

Enhancing the Efficiency of Energy-Constrained DVFS Designs

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

New and exact filling algorithms for layout density control

Andrew B. Kahng, Alex Zelikovsky, Gabriel Robins, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Hypergraph partitioning for VLSI CAD: methodology for heuristic development, experimentation and reporting

Andrew B. Kahng, Igor L. Markov, Andrew A. Kennings, 1999, DAC '99.

Predictive modeling of lithography-induced linewidth variation

Andrew B. Kahng, Swamy Muddu, 2008, Photomask Japan.

A Cross-Layer Methodology for Design and Optimization of Networks in 2.5D Systems

Andrew B. Kahng, Ajay Joshi, Ayse K. Coskun, 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Tutorial Part 3: Manufacturability

Andrew B. Kahng, A. Kahng, 2004 .

Optimal reliability-constrained overdrive frequency selection in multicore systems

Andrew B. Kahng, Siddhartha Nath, 2014, Fifteenth International Symposium on Quality Electronic Design.

Statistical Timing Analysis in the Presence of Signal-Integrity Effects

Andrew B. Kahng, Xu Xu, Bao Liu, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Interconnect optimization strategies for high-performance VLSI designs

Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Net partitions yield better module partitions

Jason Cong, Andrew B. Kahng, Lars W. Hagen, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

Quantified Impacts of Guardband Reduction on Design Process Outcomes

Andrew B. Kahng, Kambiz Samadi, Kwangok Jeong, 2008, ISQED 2008.

Rectilinear Steiner Trees with Minimum Elmore Delay

Andrew B. Kahng, Gabriel Robins, Kenneth D. Boese, 1994, 31st Design Automation Conference.

The Y-Architecture for On-Chip Interconnect: Analysis and Methodology

Andrew B. Kahng, Ion I. Mandoiu, Chung-Kuan Cheng, 2003, ICCAD.

Optimal planning for mesh-based power distribution

Andrew B. Kahng, Chung-Kuan Cheng, Hongyu Chen, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

The Cost of Design

Andrew B. Kahng, 2002 .

Routing-aware scan chain ordering

Puneet Gupta, Andrew B. Kahng, Stefanus Mantik, 2003, ASP-DAC '03.

Border Length Minimization in DNA Array Design

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2002, WABI.

High-performance gate sizing with a signoff timer

Andrew B. Kahng, Igor L. Markov, Seokhyeong Kang, 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Futures for Partitioning in Physical Design

Andrew B. Kahng, A. Kahng, 1998 .

A direct combination of the Prim and Dijkstra constructions for improved performance-driven global routing

Andrew B. Kahng, Charles J. Alpert, T. C. Hu, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?

Fook-Luen Heng, Andrew B. Kahng, Vijay Pitchumani, 2005, ASP-DAC.

Theory and Algorithms of Physical Design

Andrew B. Kahng, Chung-Kuan Cheng, T. C. Hu, 2018, ISPD.

Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion

Andrew B. Kahng, Puneet Sharma, Rasit Onur Topaloglu, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Impact of gate-length biasing on threshold-voltage selection

Andrew B. Kahng, Puneet Sharma, Swamy Muddu, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

BEOL stack-aware routability prediction from placement using data mining techniques

Andrew B. Kahng, Siddhartha Nath, Kambiz Samadi, 2016, 2016 IEEE 34th International Conference on Computer Design (ICCD).

A Remote Robotics Laboratory on the Internet

Yu Cao, Andrew B. Kahng, Tianwei Chen, 1998 .

Reliability-Constrained Die Stacking Order in 3DICs

Andrew B. Kahng, Tuck-Boon Chan, Jiajia Li, 2013 .

Hierarchical whitespace allocation in top-down placement

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Quantum-dot cellular automata (QCA) circuit partitioning: problem modeling and solutions

Andrew B. Kahng, Michael T. Niemier, Xiaobo Sharon Hu, 2004, Proceedings. 41st Design Automation Conference, 2004..

Revisiting the linear programming framework for leakage power vs. performance optimization

Andrew B. Kahng, Hailong Yao, Kwangok Jeong, 2009, 2009 10th International Symposium on Quality Electronic Design.

Computer-Aided Optimization of DNA Array Design and Manufacturing

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Analytical delay models for VLSI interconnects under ramp input

Andrew B. Kahng, Sudhakar Muddu, Kei Masuko, 1996, ICCAD 1996.

Nanometer design: place your bets

Patrick Groeneveld, Andrew B. Kahng, Shekhar Y. Borkar, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

International Symposium on Physical Design (ISPD)

Andrew B. Kahng, Sachin S. Sapatnekar, Jiang Hu, 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

SMM: scalable analysis of power delivery networks by stochastic moment matching

Sheldon X.-D. Tan, Andrew B. Kahng, Bao Liu, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

Effective iterative techniques for fingerprinting design IP [VLSI CAD]

Miodrag Potkonjak, Andrew B. Kahng, Hyun-Jin Choi, 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

Analytical Engines are Unnecessary in Top-down Partitioning-based Placement

Andrew B. Kahng, Igor L. Markov, Tony F. Chan, 1999, VLSI Design.

Trace-driven optimization of networks-on-chip configurations

Andrew B. Kahng, Bill Lin, Kambiz Samadi, 2010, Design Automation Conference.

Toward accurate models of achievable routing

Andrew B. Kahng, Dirk Stroobandt, Stefanus Mantik, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Yield-driven multi-project reticle design and wafer dicing

Alexander Zelikovsky, Andrew B. Kahng, Ion I. Mandoiu, 2005, SPIE Photomask Technology.

Toward Holistic Modeling, Margining and Tolerance of IC Variability

Andrew B. Kahng, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Revisiting 3DIC benefit with multiple tiers

Andrew B. Kahng, Jiajia Li, Wei-Ting Jonas Chan, 2017, Integr..

Co-optimization of memory BIST grouping, test scheduling, and logic placement

Andrew B. Kahng, Ilgweon Kang, A. Kahng, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Enhanced Design Flow and Optimizations for Multiproject Wafers

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Error tolerance

Andrew B. Kahng, A. Kahng, 2003, IEEE Design & Test of Computers.

Fast yield-driven fracture for variable shaped beam mask writing

Andrew B. Kahng, Alex Zelikovsky, Xu Xu, 2006, Photomask Japan.

Zero skew clock routing with minimum wirelength

Jan-Ming Ho, Andrew B. Kahng, Yu-Chin Hsu, 1992 .

Crosstalk-aware signal probability-based dynamic statistical timing analysis

Andrew B. Kahng, Yao Chen, Wenjun Wang, 2015, Sixteenth International Symposium on Quality Electronic Design.

Linear and Integer Programming Made Easy

Andrew B. Kahng, T. C. Hu, 2016 .

Evaluation of placer suboptimality via zero-change netlist transformations

Andrew B. Kahng, Sherief Reda, 2005, ISPD '05.

Multi-Way System Partitioning into a Single Type or Multiple Types of FPGAs

Andrew B. Kahng, Dennis J.-H. Huang, A. Kahng, 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

Q-Tree: a new iterative improvement approach for buffered interconnect optimization

Andrew B. Kahng, Bao Liu, 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..

Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution

Andrew B. Kahng, Jiajia Li, Kwangsoo Han, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

How to test a tree

Andrew B. Kahng, Gabriel Robins, Elizabeth A. Walkup, 1998, Networks.

Self-compensating design for reduction of timing and leakage sensitivity to systematic pattern dependent variation

Dennis Sylvester, Andrew B. Kahng, Puneet Gupta, 2006, SPIE Advanced Lithography.

Delay uncertainty and signal criticality driven routing channel optimization for advanced DRAM products

Andrew B. Kahng, Mulong Luo, Kwangsoo Han, 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).

ORION 2.0: A Power-Area Simulator for Interconnection Networks

Andrew B. Kahng, Li-Shiuan Peh, Kambiz Samadi, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Robust IP watermarking methodologies for physical design

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

Design technology productivity in the DSM era (invited talk)

Andrew B. Kahng, 2001, ASP-DAC '01.

Performance-driven OPC for mask cost reduction

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2005, Sixth international symposium on quality electronic design (isqed'05).

Fast dual graph-based hotspot detection

Andrew B. Kahng, Chul-Hong Park, Xu Xu, 2006, SPIE Photomask Technology.

Constraint-based watermarking techniques for design IP protection

Miodrag Potkonjak, Andrew B. Kahng, Igor L. Markov, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Fast Dual-Graph-Based Hotspot Filtering

Andrew B. Kahng, Chul-Hong Park, Xu Xu, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Gate load delay computation using analytical models

Andrew B. Kahng, Sudhakar Muddu, 1996, Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems.

Electrical metrics for lithographic line-end tapering

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2008, Photomask Japan.

Design challenges at 65nm and beyond

Andrew B. Kahng, 2007 .

The associative-skew clock routing problem

Gang Qu, Andrew B. Kahng, Yu Chen, 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

Mixed cell-height implementation for improved design quality in advanced nodes

Andrew B. Kahng, Jiajia Li, Sorin Dobre, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Auctions with Buyer Preferences

Andrew B. Kahng, Ion I. Mandoiu, Yu Chen, 2002, Information Systems: The e-Business Challenge.

Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures

Andrew B. Kahng, Tajana Simunic, Ayse K. Coskun, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

Design flow enhancements for DNA arrays

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2003, Proceedings 21st International Conference on Computer Design.

On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling

Andrew B. Kahng, Tuck-Boon Chan, Wei-Ting Jonas Chan, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Low-power integrated-circuit implementation exploiting system and application information

Andrew B. Kahng, Seokhyeong Kang, 2013 .

A procedure and program to calculate shuttle mask advantage

Andrew B. Kahng, A. Balasinski, J. Cetin, 2006, SPIE Photomask Technology.

Accurate Analytical Delay Models for VLSI Interconnects

Andrew B. Kahng, Sudhakar Muddu, 1995 .

Measurement of inherent noise in EDA tools

Andrew B. Kahng, Stefanus Mantik, 2002, Proceedings International Symposium on Quality Electronic Design.

Cost-driven mask strategies considering parametric yield, defectivity, and production volume

Andrew B. Kahng, Christopher J. Progler, Kwangok Jeong, 2011 .

Efficient trace-driven metaheuristics for optimization of networks-on-chip configurations

Andrew B. Kahng, Bill Lin, Kambiz Samadi, 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Efficient Optimization by Modifying the Objective Function: Applications to Timing-Driven

Andrew B. Kahng, Igor L. Markov, R. Baldick, 2001 .

Performance-impact limited area fill synthesis

Puneet Gupta, Andrew B. Kahng, Yu Chen, 2003, DAC '03.

Accuracy-configurable adder for approximate arithmetic designs

Andrew B. Kahng, Seokhyeong Kang, A. Kahng, 2012, DAC Design Automation Conference 2012.

OPTIMAL ALGORITHMS FOR SUBSTRATE TESTING IN MULTI-CHIP MODULES

Andrew B. Kahng, Gabriel Robins, Elizabeth A. Walkup, 1995 .

DATC RDF-2020: Strengthening the Foundation for Academic Research in IC Physical Design

Yih-Lang Li, Andrew B. Kahng, Jianli Chen, 2020, 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

High-performance clock routing based on recursive geometric matching

Jason Cong, Andrew B. Kahng, Gabriel Robins, 1991, 28th ACM/IEEE Design Automation Conference.

Toward quantifying the IC design value of interconnect technology improvements

Andrew B. Kahng, Jiajia Li, Tuck-Boon Chan, 2013, 2013 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Implementation and extensibility of an analytic placer

Andrew B. Kahng, Qinke Wang, 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Quantifying error in dynamic power estimation of CMOS circuits

Puneet Gupta, Andrew B. Kahng, 2003, Fourth International Symposium on Quality Electronic Design, 2003. Proceedings..

Analog and Mixed‐Signal Circuit Design for Yield and Manufacturability

Andrew B. Kahng, Anurag Mittal, Ban Wong, 2008 .

ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration

Andrew B. Kahng, Li-Shiuan Peh, Kambiz Samadi, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

A new adaptive multi-start technique for combinatorial global optimizations

Andrew B. Kahng, Sudhakar Muddu, Kenneth D. Boese, 1994, Oper. Res. Lett..

Leveraging thermally-aware chiplet organization in 2.5D systems to reclaim dark silicon

Andrew B. Kahng, Saiful A. Mojumder, Ajay Joshi, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Nano-CMOS Design for Manufacturability: Robust Circuit and Physical Design for Sub-65nm Technology Nodes

Andrew B. Kahng, Anurag Mittal, Greg Starr, 2008 .

Toward metrics of design automation research impact

Andrew B. Kahng, David Z. Pan, Siddhartha Nath, 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Trading Accuracy for Energy in Stochastic Circuit Design

John P. Hayes, Andrew B. Kahng, Armin Alaghi, 2017, ACM J. Emerg. Technol. Comput. Syst..

Hypergraph partitioning with fixed vertices [VLSI CAD]

Andrew B. Kahng, Charles J. Alpert, Andrew E. Caldwell, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Toward better wireload models in the presence of obstacles

Andrew B. Kahng, Chung-Kuan Cheng, Dirk Stroobandt, 2001, ASP-DAC '01.

Toward Metrics of Design Automation Research Impact ( invited paper )

Andrew B. Kahng, David Z. Pan, Siddhartha Nath, 2015 .

2001 Technology Roadmap for Semiconductors

Yervant Zorian, Andrew B. Kahng, William H. Joyner, 2002, Computer.

On clock routing for general cell layouts

Jason Cong, Andrew B. Kahng, Gabriel Robins, 1991, [1991] Proceedings Fourth Annual IEEE International ASIC Conference and Exhibit.

Measuring progress and value of IC implementation technology

Andrew B. Kahng, Hyein Lee, Jiajia Li, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Recent developments in netlist partitioning: a survey

Andrew B. Kahng, Charles J. Alpert, C. Alpert, 1995 .

Stochastic Power/Ground Supply Voltage Prediction and Optimization Via Analytical Placement

Andrew B. Kahng, Bao Liu, Qinke Wang, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A general framework for vertex orderings with applications to circuit clustering

Andrew B. Kahng, Charles J. Alpert, 1996, IEEE Trans. Very Large Scale Integr. Syst..

2003 technology roadmap for semiconductors

Yervant Zorian, Andrew B. Kahng, Mike Rodgers, 2004, Computer.

Can recursive bisection alone produce routable, placements?

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, Proceedings 37th Design Automation Conference.

Interconnect implications of growth-based structural models for VLSI circuits

Andrew B. Kahng, Chung-Kuan Cheng, Bao Liu, 2001, SLIP '01.

Lithography-induced limits to scaling of design quality

Andrew B. Kahng, 2014, Advanced Lithography.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Radu Marculescu, Majid Sarrafzadeh, Vishwani D. Agrawal, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Worst-case performance prediction under supply voltage and temperature variation

Andrew B. Kahng, Chung-Kuan Cheng, Kambiz Samadi, 2010, SLIP '10.

Design technology productivity in the DSM era

Andrew B. Kahng, 2001, Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455).

Noise and delay uncertainty studies for coupled RC interconnects

Andrew B. Kahng, Sudhakar Muddu, D. Vidhani, 1999, Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454).

Implications of area-array I/O for row-based placement methodology

Andrew B. Kahng, Igor L. Markov, Stefanus Mantik, 1998, Proceedings. 1998 IEEE Symposium on IC/Package Design Integration (Cat. No.98CB36211).

Optimal equivalent circuits for interconnect delay calculations using moments

Andrew B. Kahng, Sudhakar Muddu, A. Kahng, 1994, EURO-DAC '94.

The Road Ahead: The significance of packaging

Andrew B. Kahng, 2002, IEEE Des. Test Comput..

ILP-Based Identification of Redundant Logic Insertions for Opportunistic Yield Improvement during Early Process Learning

Andrew B. Kahng, Tuck-Boon Chan, Wei-Ting Jonas Chan, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

On potential design impacts of electromigration awareness

Andrew B. Kahng, Tajana Simunic, Siddhartha Nath, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Iterative Partitioning with Varying Node Weights

Andrew B. Kahng, Igor L. Markov, Andrew E. Caldwell, 2000, VLSI Design.

Asymmetric Binary Covering Codes

Joshua N. Cooper, Andrew B. Kahng, Robert B. Ellis, 2002, J. Comb. Theory, Ser. A.

The Future of Signoff

Andrew B. Kahng, 2011, IEEE Des. Test Comput..

Zero-Change Netlist Transformations: A New Technique for Placement Benchmarking

Andrew B. Kahng, Sherief Reda, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Performance-driven optical proximity correction for mask cost reduction

Dennis Sylvester, Andrew B. Kahng, Puneet Gupta, 2007 .

A new approach to effective circuit clustering

Andrew B. Kahng, Lars W. Hagen, 1992, ICCAD.

Architectural-level prediction of interconnect wirelength and fanout

Andrew B. Kahng, Kambiz Samadi, Kwangok Jeong, 2009, 2009 International SoC Design Conference (ISOCC).

Minimum density interconnection trees

Jason Cong, Majid Sarrafzadeh, Andrew B. Kahng, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Advanced timing analysis based on post-OPC extraction of critical dimensions

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Performance-impact limited-area fill synthesis

Yu Chen, Andrew B. Kahng, Puneet Gupta, 2003, SPIE Advanced Lithography.

Benchmarking of mask fracturing heuristics

Andrew B. Kahng, Emile Sahouria, Tuck-Boon Chan, 2014, ICCAD 2014.

PANEL: tools or users: which is the bigger bottleneck?

Andrew B. Kahng, B. Dahlberg, 2002, DAC 2002.

On the Bounded-Skew Clock and Steiner Routing Problems

Andrew B. Kahng, Dennis J.-H. Huang, Chung-Wen Albert Tsao, 1995, 32nd Design Automation Conference.

Improved performance of 3DIC implementations through inherent awareness of mix-and-match die stacking

Andrew B. Kahng, Jiajia Li, Kwangsoo Han, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Compressible area fill synthesis

Andrew B. Kahng, Yu Chen, Alex Zelikovsky, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A practical transistor-level dual threshold voltage assignment methodology

Puneet Gupta, Andrew B. Kahng, Puneet Sharma, 2005, Sixth international symposium on quality electronic design (isqed'05).

Matching-based methods for high-performance clock routing

Jason Cong, Andrew B. Kahng, Gabriel Robins, 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Optimization of linear placements for wirelength minimization with free sites

Andrew B. Kahng, Alex Zelikovsky, Paul Tucker, 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

Cooperative Mobile Robotics: Antecedents and Directions

Andrew B. Kahng, Alex S. Fukunaga, Y. Uny Cao, 1995, Proceedings 1995 IEEE/RSJ International Conference on Intelligent Robots and Systems. Human Robot Interaction and Cooperative Robots.

Investigation of performance metrics for interconnect stack architectures

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2004, SLIP '04.

Accurate Machine-Learning-Based On-Chip Router Modeling

Andrew B. Kahng, Binshan Lin, Kambiz Samadi, 2010, IEEE Embedded Systems Letters.

Delay Analysis of VLSI Interconnections Using the Diffusion Equation Model

Andrew B. Kahng, Sudhakar Muddu, 1994, 31st Design Automation Conference.

Interaction of Layout with Transistor Performance and Stress Engineering Techniques

Andrew B. Kahng, Anurag Mittal, Victor Moroz, 2008 .

New directions for learning-based IC design tools and methodologies

Andrew B. Kahng, A. Kahng, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

Subwavelength optical lithography: challenges and impact on physical design

Andrew B. Kahng, Y. C. Pati, Y. C. Pati, 1999, ISPD '99.

Introduction to the Simplex Method

Andrew B. Kahng, T. C. Hu, 2016 .

Accurate pseudo-constructive wirelength and congestion estimation

Andrew B. Kahng, Xu Xu, 2003, SLIP '03.

Effects of global interconnect optimizations on performance estimation of deep submicron design

Yu Cao, Dennis Sylvester, Andrew B. Kahng, 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

Near-optimal critical sink routing tree constructions

Andrew B. Kahng, Gabriel Robins, Kenneth D. Boese, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Improved Large-Step Markov Chain Variants for the Symmetric TSP

Andrew B. Kahng, Byung Ro Moon, Inki Hong, 1997, J. Heuristics.

Optimization of Overdrive Signoff in High-Performance and Low-Power ICs

Andrew B. Kahng, Siddhartha Nath, Jiajia Li, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Simulated annealing of neural networks: The 'cooling' strategy reconsidered

Andrew B. Kahng, Kenneth D. Boese, A. Kahng, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Dose map and placement co-optimization for timing yield enhancement and leakage power reduction

Andrew B. Kahng, Hailong Yao, Chul-Hong Park, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Fill for Shallow Trench Isolation CMP

Andrew B. Kahng, Puneet Sharma, Alex Zelikovsky, 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

Delay Models for MCM Interconnects When Response

Andrew B. Kahng, Sudhakar Muddu, Kei Masuko, 1997 .

Match twice and stitch: a new TSP tour construction heuristic

Andrew B. Kahng, Sherief Reda, A. Kahng, 2004, Oper. Res. Lett..

Analytical delay models for VLSI interconnects under ramp input

Andrew B. Kahng, Sudhakar Muddu, Kei Masuko, 1996, Proceedings of International Conference on Computer Aided Design.

Predictive modeling of integrated circuit manufacturing variation

Andrew B. Kahng, Swamy Muddu, 2007 .

Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography

Andrew B. Kahng, Kwangok Jeong, 2009, 2009 Asia and South Pacific Design Automation Conference.

Methodology for electromigration signoff in the presence of adaptive voltage scaling

Andrew B. Kahng, Siddhartha Nath, Wei-Ting Jonas Chan, 2014, 2014 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

Performance and variability driven guidelines for BEOL layout decomposition with LELE double patterning

Andrew B. Kahng, Tuck-Boon Chan, Kwangok Jeong, 2011, Photomask Technology.

Fast spectral methods for ratio cut partitioning and clustering

Andrew B. Kahng, Lars W. Hagen, A. Kahng, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

Proceedings of the 52nd Annual Design Automation Conference

Andrew B. Kahng, Grant Martin, William H. Joyner, 2015, DAC.

Predicting the future of information technology and society [The Road Ahead]

Andrew B. Kahng, 2012, IEEE Des. Test Comput..

Layout-aware scan chain synthesis for improved path delay fault coverage

Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Revisiting the layout decomposition problem for double patterning lithography

Andrew B. Kahng, Hailong Yao, Chul-Hong Park, 2008, Photomask Technology.

Finding placement-relevant clusters with fast modularity-based clustering

Andrew B. Kahng, Mateus Fogaça, Ricardo Reis, 2019, ASP-DAC.

Modeling OPC complexity for design for manufacturability

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2005, SPIE Photomask Technology.

Investigation of diffusion rounding for post-lithography analysis

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2008, 2008 Asia and South Pacific Design Automation Conference.

Looking Into the Mirror of Open Source: Invited Paper

Andrew B. Kahng, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Improved effective capacitance computations for use in logic and layout optimization

Andrew B. Kahng, Sudhakar Muddu, A. Kahng, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Lens Aberration Aware Timing-Driven Placement

Andrew B. Kahng, Puneet Sharma, Chul-Hong Park, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Low-cost single-layer clock trees with exact zero Elmore delay skew

Andrew B. Kahng, Chung-Wen Albert Tsao, 1994, ICCAD.

Provably good global buffering using an available buffer block plan

Andrew B. Kahng, Ion I. Mandoiu, Feodor F. Dragan, 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

Shaping gate channels for improved devices

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2008, SPIE Advanced Lithography.

Provably good global buffering by multi-terminal multicommodity flow approximation

Andrew B. Kahng, Ion I. Mandoiu, Feodor F. Dragan, 2001, ASP-DAC '01.

Optimal planning for mesh-based power distribution

Andrew B. Kahng, Chung-Kuan Cheng, Hongyu Chen, 2004 .

Keynote and Plenary Talks

Fadi J. Kurdahi, Andrew B. Kahng, Fabio Campi, 2012, ISVLSI 2012.

Is overlay error more important than interconnect variations in double patterning?

Andrew B. Kahng, Rasit Onur Topaloglu, Kwangok Jeong, 2009, SLIP '09.

Enhanced resist and etch CD control by design perturbation

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2005, SPIE Photomask Technology.

Recent directions in netlist partitioning

Andrew B. Kahng, Charles J. Alpert, 1995 .

Bounded-lifetime integrated circuits

Puneet Gupta, Andrew B. Kahng, 2008, 2008 45th ACM/IEEE Design Automation Conference.

On implementation choices for iterative improvement partitioning algorithms

Andrew B. Kahng, Dennis J.-H. Huang, Lars W. Hagen, 1995, EURO-DAC '95/EURO-VHDL '95.

Lithography‐Related Aspects of DFM

Andrew B. Kahng, Anurag Mittal, Ban Wong, 2008 .

Many-Core Token-Based Adaptive Power Gating

Andrew B. Kahng, Tajana Simunic, Seokhyeong Kang, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Designing a processor from the ground up to allow voltage/reliability tradeoffs

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.

Bright-field AAPSM conflict detection and correction

Andrew B. Kahng, Alex Zelikovsky, Subarna Sinha, 2005, Design, Automation and Test in Europe.

Manufacturing-aware physical design

Andrew B. Kahng, Puneet Gupta, A. Kahng, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005

Andrew B. Kahng, Grant Martin, William H. Joyner, 2004, DAC.

Layout decomposition for double patterning lithography

Andrew B. Kahng, Hailong Yao, Chul-Hong Park, 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

Guest Editorial

Majid Sarrafzadeh, Andrew B. Kahng, A. Kahng, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

New results and algorithms for MCM substrate testing

Andrew B. Kahng, Gabriel Robins, Elizabeth A. Walkup, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Title RedCooper : Hardware Sensor Enabled Variability Software Testbed for Lifetime Energy Constrained Application Permalink

Puneet Gupta, Mani Srivastava, Dennis Sylvester, 2013 .

Tools or users: which is the bigger bottleneck?

Patrick Groeneveld, Andrew B. Kahng, Nancy Nettleton, 2002, DAC '02.

An Improved Methodology for Resilient Design Implementation

Andrew B. Kahng, Seokhyeong Kang, Jiajia Li, 2015, ACM Trans. Design Autom. Electr. Syst..

Noise model for multiple segmented coupled RC interconnects

Andrew B. Kahng, Sudhakar Muddu, Devendra Vidhani, 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

Practical Approximations of Steiner Trees in Uniform Orientation Metrics

Andrew B. Kahng, Ion I. Mandoiu, Alex Zelikovsky, 2007, Handbook of Approximation Algorithms and Metaheuristics.

Manufacturing-aware design methodology for assist feature correctness

Puneet Gupta, Andrew B. Kahng, Chul-Hong Park, 2005, SPIE Advanced Lithography.

On switch factor based analysis of coupled RC interconnects

Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, 2000, Proceedings 37th Design Automation Conference.

Faster minimization of linear wirelength for global placement

Andrew B. Kahng, Igor L. Markov, Tony F. Chan, 1997, ISPD '97.

Limitations and challenges of computer-aided design technology for CMOS VLSI

Jan M. Rabaey, Kurt Keutzer, Alberto Sangiovanni-Vincentelli, 2001, Proc. IEEE.

METRICS: a system architecture for design process optimization

Andrew B. Kahng, Stefanus Mantik, David George, 2000, Proceedings 37th Design Automation Conference.

Improving critical dimension accuracy and throughput by subfield scheduling in electron beam mask writing

Andrew B. Kahng, Sergey V. Babin, Swamy Muddu, 2005 .

Sensitivity-guided metaheuristics for accurate discrete gate sizing

Jin Hu, Andrew B. Kahng, Igor L. Markov, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A cost-driven lithographic correction methodology based on off-the-shelf sizing tools

Puneet Gupta, Dennis Sylvester, Andrew B. Kahng, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

Classical floorplanning harmful?

Andrew B. Kahng, A. Kahng, 2000, ISPD '00.

Bounded-skew clock and Steiner routing

Jason Cong, Cheng-Kok Koh, Andrew B. Kahng, 1998, TODE.

CMP Fill Synthesis: A Survey of Recent Studies

Andrew B. Kahng, Kambiz Samadi, A. Kahng, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

PROBE: A Placement, Routing, Back-End-of-Line Measurement Utility

Andrew B. Kahng, Hyein Lee, Jiajia Li, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Lithography and design in partnership: a new roadmap

Andrew B. Kahng, A. Kahng, 2008, Photomask Technology.

New yield-aware mask strategies

Andrew B. Kahng, Christopher J. Progler, Kwangok Jeong, 2011, Photomask Japan.

Exploiting STI stress for performance

Andrew B. Kahng, Puneet Sharma, Rasit Onur Topaloglu, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Subfield scheduling for throughput maximization in electron-beam photomask fabrication

Andrew B. Kahng, Ion I. Mandoiu, Sergey V. Babin, 2003, SPIE Advanced Lithography.

Subwavelength lithography (panel): how will it affect your design flow?

Andrew B. Kahng, Y. C. Pati, Robert Pack, 1999, DAC '99.

Beyond the red brick wall (panel): challenges and solutions in 50nm physical design

Sani R. Nassif, Hidetoshi Onodera, Andrew B. Kahng, 2001, ASP-DAC '01.

Modeling of non-uniform device geometries for post-lithography circuit analysis

Dennis Sylvester, Andrew B. Kahng, Puneet Gupta, 2006, SPIE Advanced Lithography.

Shared Red Bricks

Andrew B. Kahng, 2002, IEEE Des. Test Comput..

New multilevel and hierarchical algorithms for layout density control

Andrew B. Kahng, Alex Zelikovsky, Gabriel Robins, 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

An algebraic multigrid solver for analytical placement with layout based clustering

Andrew B. Kahng, Chung-Kuan Cheng, Bo Yao, 2003, DAC '03.

Horizontal benchmark extension for improved assessment of physical CAD research

Andrew B. Kahng, Hyein Lee, Jiajia Li, 2014, GLSVLSI '14.

Improved on-chip router analytical power and area modeling

Andrew B. Kahng, Bill Lin, Kambiz Samadi, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Multilevel circuit partitioning

Andrew B. Kahng, Charles J. Alpert, Dennis J.-H. Huang, 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis

Andrew B. Kahng, Sachin S. Sapatnekar, Hadi Esmaeilzadeh, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Enhanced Power Delivery Pathfinding for Emerging 3-D Integration Technology

Andrew B. Kahng, Seokhyeong Kang, Bangqi Xu, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD ICCAD Special Session Paper

Andrew B. Kahng, Ravi Varadarajan, Jinwook Jung, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

CoRe-ECO: Concurrent Refinement of Detailed Place-and-Route for an Efficient ECO Automation

Andrew B. Kahng, Chung-Kuan Cheng, Ilgweon Kang, 2021, 2021 IEEE 39th International Conference on Computer Design (ICCD).

In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence

Andrew B. Kahng, Wen-Hao Liu, Jian Kuang, 2021 .

TritonRoute-WXL: The Open-Source Router With Integrated DRC Engine

Andrew B. Kahng, Bangqi Xu, Lutong Wang, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Advancing Placement

Andrew B. Kahng, 2021, ISPD.

DATC RDF-2021: Design Flow and Beyond ICCAD Special Session Paper

Andrew B. Kahng, Ravi Varadarajan, Jinwook Jung, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

PROBE2.0: A Systematic Framework for Routability Assessment From Technology to Design in Advanced Nodes

Andrew B. Kahng, Hayoung Kim, Chung-Kuan Cheng, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Performance-Driven Routing Tree Design

David R. Karger, Andrew B. Kahng, Charles J. Alpert, 1995 .

Exploiting fractalness of error surfaces: New methods for neural network learning

Andrew B. Kahng, A. Kahng, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Improving the quadratic objective function in module placement

Andrew B. Kahng, L. Hagen, A. Kahng, 1992, [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit.

Matching-Based Methods for High-Performance

Jason Cong, Andrew B. Kahng, Gabriel Robins, 1993 .

Variability-Driven Considerations in the Design of Integrated-Circuit Global Interconnects

Jinjun Xiong, Andrew B. Kahng, Lei He, 2004 .

Comprehensive Modeling Methodologies for NoC Router Estimation

Andrew B. Kahng, Siddhartha Nath, Bill Lin, 2012 .

International Symposium on Physical Design (ISPD)

Andrew B. Kahng, Sachin S. Sapatnekar, Jiang Hu, 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On the Minimum Density Interconnection Tree Problem

Jason Cong, Majid Sarrafzadeh, Andrew B. Kahng, 1994 .

Low-cost Single-layer Clock Trees With Exact Zero Elmore Delay Skew

Andrew B. Kahng, Chung-Wen Albert Tsao, A. Kahng, 1994, IEEE/ACM International Conference on Computer-Aided Design.

The Knapsack Problem

Andrew B. Kahng, T. C. Hu, 2016 .

Vlsi clock net routing

Andrew B. Kahng, Chung-Wen Tsao, 1996 .

Recovery-Driven Design

John Sartori, Andrew B. Kahng, Seokhyeong Kang, 2010 .

Scan Chain Optimization : Heuristic and Optimal

Andrew B. Kahng, SolutionsKenneth D. Boese, Ren-Song TsayyOctober, 1994 .

Cell Phone Controlled Robot with Fire Detection Sensors

Andrew B. Kahng, Frank Meng, 2015 .

Studies of Interconnect Tuning for High-Performance Designs

Andrew B. Kahng, Sudhakar Muddu, Rahul Sharma, 1997 .