Z. Krivokapic

Process and device modeling of LIGTs for smart power applications

L. Trontelj, Z. Krivokapic, V. Kregar, 1991, [1991 Proceedings] 6th Mediterranean Electrotechnical Conference.

Implications of Gate Misalignment for Ultra-narrow Multi-gate Devices

V. Moroz, Z. Krivokapic, 2004 .

14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications

R. Sporer, P. Polakowski, H. J. Kim, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

Locally strained ultra-thin channel 25nm narrow FDSOI devices with metal gate and mesa isolation

M.-R. Lin, V. Moroz, Z. Krivokapic, 2003, IEEE International Electron Devices Meeting 2003.

Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gates

M.-R. Lin, Z. Krivokapic, W. Maszara, 2002, Digest. International Electron Devices Meeting,.

Nickel silicide metal gate FDSOI devices with improved gate oxide leakage

M.-R. Lin, J. Zhang, A. Marathe, 2002, Digest. International Electron Devices Meeting,.

High performance 25 nm FDSOI devices with extremely thin silicon channel

A. Marathe, J. Chan, Z. Krivokapic, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: experiments

Y. Nishi, K. Uchida, Z. Krivokapic, 2006, IEEE Transactions on Electron Devices.

Manufacturability of 20-nm ultrathin body fully depleted SOI devices with FUSI metal gates

Z. Krivokapic, W. Maszara, Z. Krivokapic, 2005, IEEE Transactions on Semiconductor Manufacturing.

A comprehensive model for crossbar memory arrays

An Chen, Ming-Ren Lin, Z. Krivokapic, 2012, 70th Device Research Conference.

Complimentary single-electron/hole action of nanoscale SOI CMOS transistors

Z. Krivokapic, K.L. Wang, Yaohui Zhang, 2004, IEEE Electron Device Letters.