Marcos Herve

Concurrent test of Network-on-Chip interconnects and routers

Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Marcos Herve, 2010, 2010 11th Latin American Test Workshop.

Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults

Marcelo Lubaszewski, Marcos Herve, Erika Cota, 2009, 2009 15th IEEE International On-Line Testing Symposium.

Low pin count DfT technique for RFID ICs

Marcelo Lubaszewski, Marcos Herve, Marcelo de Souza Moraes, 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Electron. Test..

Data compression and decompression Integrated Circuit for AC Power Quality data

Sergio Bampi, Altamiro Amadeu Susin, Cristiano Thiele, 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

Improving the yield of NoC-based systems through fault diagnosis and adaptive routing

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Parallel Distributed Comput..

Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors

Marcelo Lubaszewski, Marcos Herve, Gilson Wirth, 2009, 2009 10th Latin American Test Workshop.

A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip

Alexandre M. Amory, Marcelo Lubaszewski, Érika F. Cota, 2008, IEEE Transactions on Computers.

Diagnosis of interconnect shorts in mesh NoCs

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.