N. Pete Sedcole

发表

Implementation of Wave-Pipelined Interconnects in FPGAs

Wayne Luk, Terrence S. T. Mak, Alexandre Yakovlev, 2008, Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008).

Self-Measurement of Combinatorial Circuit Delays in FPGAs

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2009, TRETS.

Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations

Peter Y. K. Cheung, N. Pete Sedcole, 2008, TRETS.

A transition probability based delay measurement method for arbitrary circuits on FPGAs

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2008, 2008 International Conference on Field-Programmable Technology.

Modelling and compensating for clock skew variability in FPGAs

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2008, 2008 International Conference on Field-Programmable Technology.

Measuring and modeling FPGA clock variability

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2008, FPGA '08.

Modular partial reconfigurable in Virtex FPGAs

Tobias Becker, N. Pete Sedcole, Patrick Lysaght, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Self-characterization of Combinatorial Circuit Delays in FPGAs

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2007, 2007 International Conference on Field-Programmable Technology.

Fault tolerant methods for reliability in FPGAs

Peter Y. K. Cheung, Edward A. Stott, N. Pete Sedcole, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis

Peter Y. K. Cheung, N. Pete Sedcole, P. Cheung, 2007, FPGA '07.

Run-Time Integration of Reconfigurable Video Processing Systems

Wayne Luk, Peter Y. K. Cheung, George A. Constantinides, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

On-Chip Communication in Run-Time Assembled Reconfigurable Systems

Wayne Luk, Peter Y. K. Cheung, George A. Constantinides, 2006, 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

Within-die delay variability in 90nm FPGAs and beyond

Peter Y. K. Cheung, N. Pete Sedcole, P. Cheung, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Degradation in FPGAs: measurement and modelling

Peter Y. K. Cheung, Edward A. Stott, N. Pete Sedcole, 2010, FPGA '10.

Global interconnections in FPGAs: modeling and performance analysis

Wayne Luk, Terrence S. T. Mak, Alexandre Yakovlev, 2008, SLIP '08.

Wave-pipelined signaling for on-FPGA communication

Wayne Luk, Terrence S. T. Mak, Peter Y. K. Cheung, 2008, 2008 International Conference on Field-Programmable Technology.

Characterisation of FPGA Clock Variability

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

A Reconfigurable Platform for Real-Time Embedded Video Image Processing

Wayne Luk, Peter Y. K. Cheung, George A. Constantinides, 2003, FPL.

Combating process variation on FPGAS with a precise at-speed delay measurement method

Peter Y. K. Cheung, N. Pete Sedcole, Justin S. J. Wong, 2008, 2008 International Conference on Field Programmable Logic and Applications.

A structured system methodology for FPGA based system-on-a-chip design

Wayne Luk, Peter Y. K. Cheung, George A. Constantinides, 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

Interconnection lengths and delays estimation for communication links in FPGAs

Wayne Luk, Terrence S. T. Mak, Peter Y. K. Cheung, 2008, SLIP '08.

On-FPGA Communication Architectures and Design Factors

Wayne Luk, Terrence S. T. Mak, Peter Y. K. Cheung, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Throughput maximization for wave-pipelined interconnects using cascaded buffers and transistor sizing

Li Wang, Terrence S. T. Mak, Peter Y. K. Cheung, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Wave-pipelined intra-chip signaling for on-FPGA communications

Wayne Luk, Terrence S. T. Mak, Peter Y. K. Cheung, 2010, Integr..

A Structured Methodology for System-on-an-FPGA Design

Wayne Luk, Peter Y. K. Cheung, George A. Constantinides, 2004, FPL.

A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing

Wayne Luk, Terrence S. T. Mak, Peter Y. K. Cheung, 2007, First International Symposium on Networks-on-Chip (NOCS'07).

Compensating for variability in FPGAs by re-mapping and re-placement

Peter Y. K. Cheung, Edward A. Stott, N. Pete Sedcole, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Fault tolerance and reliability in field-programmable gate arrays

Peter Y. K. Cheung, Edward A. Stott, N. Pete Sedcole, 2010, IET Computers & Digital Techniques.