Tzu-Chieh Tien

Integrating logic retiming and register placement

Youn-Long Lin, Hsiao-Pin Su, Yih-Chih Chou, 1998, ICCAD.

A synthesis method for mixed synchronous/asynchronous behavior

Youn-Long Lin, Allen C.-H. Wu, Tsung-Yi Wu, 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

Performance-optimal clustering with retiming for sequential circuits

Youn-Long Lin, Tzu-Chieh Tien, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Performance-optimal clustering with retiming for sequential circuits

Youn-Long Lin, Tzu-Chieh Tien, 2000, ASP-DAC.

Integrating logic retiming and register placement

Youn-Long Lin, Hsiao-Pin Su, Yih-Chih Chou, 1998, ICCAD '98.