Hiromu Ishikawa

A 2.88Gb/s digital hopping UWB transceiver

Hitoshi Yano, Akio Tanaka, Naoki Oshima, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Wide Lock-Range, Low Phase-Noise PLL using Interpolative Ring-VCO with Coarse Frequency Tuning and Frequency Linearization

Hiroyuki Okada, Akio Tanaka, Hiroshi Kodama, 2007, 2007 IEEE Custom Integrated Circuits Conference.

A 1.3-degree I/Q phase error, 7.1 – 8.7-GHz LO generator with single-stage digital tuning polyphase filter

Naoki Oshima, Hiromu Ishikawa, Hiroshi Kodama, 2010, 2010 Symposium on VLSI Circuits.