Tim Kogel

发表

From milliwatts to megawatts : System level power challenge

Jason Cong, John Shen, Ruchir Puri, 2009, 2009 46th ACM/IEEE Design Automation Conference.

From ESL 2010 to ESL 2015

Grant Martin, Adam Donlin, Tor E. Jeremiassen, 2010, 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends

Rainer Leupers, Heinrich Meyr, Tim Kogel, 2008, Int. J. Embed. Syst..

Guest Editorial: Communication-Aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators

Maurizio Palesi, Kun-Chih Chen, Tim Kogel, 2020, IEEE J. Emerg. Sel. Topics Circuits Syst..

A system level processor/communication co-exploration methodology for multi-processor system-on-chip platforms

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

A modular simulation framework for spatial and temporal task mapping onto multi-processor SoC platforms

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2005, Design, Automation and Test in Europe.

Retargetable generation of TLM bus interfaces for MP-SoC platforms

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).

A framework for fast hardware-software co-simulation

Heinrich Meyr, Andreas Hoffmann, Tim Kogel, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

AMAIX: A Generic Analytical Model for Deep Learning Accelerators

Rainer Leupers, Tim Kogel, Lukas Jünger, 2020, SAMOS.

A framework for automated and optimized ASIP implementation supporting multiple hardware description languages

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2005, ASP-DAC.

Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips

Rainer Leupers, Heinrich Meyr, Torsten Kempf, 2008, Int. J. Embed. Syst..

A generic tool-set for SoC multiprocessor debugging and synchronization

Andreas Hoffmann, Achim Nohl, Tim Kogel, 2003, Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003.

Virtual platforms: Breaking new grounds

Rainer Leupers, Andreas Herkersdorf, Grant Martin, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A highly efficient modeling style for heterogeneous bus architectures

Torsten Kempf, Tim Kogel, M. Ariyamparambath, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

Synopsys Virtual Prototyping for Software Development and Early Architecture Analysis

Tim Kogel, 2017, Handbook of Hardware/Software Codesign.

Heterogeneous MP-SoC - the solution to energy-efficient signal processing

Heinrich Meyr, Tim Kogel, H. Meyr, 2004, Proceedings. 41st Design Automation Conference, 2004..

A methodology and tool suite for C compiler generation from ADL processor models

Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

A modular simulation framework for architectural exploration of on-chip interconnection networks

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

Integrated system-level modeling of network-on-chip enabled multi-processor platforms

Rainer Leupers, Heinrich Meyr, Tim Kogel, 2006 .

SystemC based architecture exploration of a 3D graphic processor

Heinrich Meyr, Tim Kogel, Andreas Wieferink, 2001, 2001 IEEE Workshop on Signal Processing Systems. SiPS 2001. Design and Implementation (Cat. No.01TH8578).

An Overview of Efficient Interconnection Networks for Deep Neural Network Accelerators

Maurizio Palesi, Kun-Chih Chen, Tim Kogel, 2020, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Early ISS Integration into Network-on-Chip Designs

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2004, SAMOS.

Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2008, SAMOS.

Peripheral Modeling for Platform Driven ESL Design

Tim Kogel, Tim Kogel, 2006 .

An Executable Intermediate Representation for Retargetable Compilation and High-Level Code Optimization

Rainer Leupers, Manuel Hohenauer, Tim Kogel, 2003 .

Virtual Prototyping of Embedded Platforms for Wireless and Multimedia

Tim Kogel, Matthew Braun, Matthew Braun, 2006, Proceedings of the Design Automation & Test in Europe Conference.

A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language

Heinrich Meyr, Andreas Hoffmann, Achim Nohl, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

OCP TLM for Architectural Modelling

Tim Kogel, Anssi Haverinen, 2005, FDL.

ESL hand-off: Fact or EDA fiction?

Nikil D. Dutt, Gary Smith, Eshel Haritan, 2008, 2008 45th ACM/IEEE Design Automation Conference.

System level processor/communication co-exploration methodology for multiprocessor system-on-chip platforms

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2005 .

Compiler-in-loop Architecture Exploration for Efficient Application Specific Embedded Processor Design

Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, 2004 .

SystemC Based Design of an IP Forwarding Chip with CoCentric System Studio

Tim Kogel, Denis Bussaglia, 2002 .