T. Kuraishi

Low Power SOC Design Using Partial-Trench-Isolation ABC SOI (PTI-ABC SOI) for Sub-100-nm LSTP Technology

Y. Maki, Y. Yasu, T. Ipposhi, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

A 1.92 μs-wake-up time thick-gate-oxide power switch technique for ultra low-power single-chip mobile processors

Y. Yasu, Y. Igarashi, O. Ozawa, 2007, 2007 IEEE Symposium on VLSI Circuits.