Nagata Makoto

发表

A Signal Measurement System using On-Chip Multi-Channel Waveforme Monitor

Hashida Takushi, Noguchi Koichiro, Nagata Makoto, 2006 .

EMS Evaluation of Adaptively-Tuned Supply-Resonnace Suppression Filter

Nagata Makoto, Taniguchi Kohki, Miura Noriyuki, 2015 .

Chip-to-Chip Half Duplex Data Communication at 135 Mbps Over Power-Supply Rails

Hashida Takushi, Nagata Makoto, 2009 .

Magnetic Noise Suppressor to Facilitate Compatibility Between Power Electronic System and Next Generation RF IC for Telecommunication

Nagata Makoto, Tanaka Satoshi, Yamaguchi Masahiro, 2017 .

Evaluation of side-channel leakage in crypto modules with On-Chip-Monitor

Nagata Makoto, Miura Noriyuki, Monta Kazuki, 2018 .

ASIC Chip Implementation and Evaluation of Elliptic Curve Digital Signature Algorithm

Nagata Makoto, Miura Noriyuki, Monta Kazuki, 2019 .

A Diagnosis Testbench of Analog IP Cores Against On-Chip Environmental Disturbances

Hashida Takushi, Nagata Makoto, Araga Yuuki, 2011 .

Electromagnetic radiation by IC chip and evaluation of mobile communication interference

Nagata Makoto, Miura Noriyuki, Tanaka Satoshi, 2018 .

On-chip monitors and power-supply integrity

Nagata Makoto, 2008 .

An Autonomous Control Cache Memory for Dynamic Variation Tolerance with Bit-Enhancing Memory

Nagata Makoto, Fujiwara Hidehiro, Nii Koji, 2014 .

On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications

Nagata Makoto, Iwata Atsushi, Inoue Tomoko, 2007 .

Evaluation of on-chip power noise generation and injection in SRAM core

Nagata Makoto, Sawada Takuya, Toshikawa Taku, 2010 .

Evaluation of algorithms for waveform acquisition in on-chip multi-channel monitoring

Hashida Takushi, Nagata Makoto, Araga Yuuki, 2008 .

Logic Synthesis Technique for High Speed Dynamic Logic with Asymmetric Slope Transition

Taki Kazuo, Nagata Makoto, Morimoto Masao, 2005 .

Integrated evaluation of on-board and on-chip power noise measurement results in digital LSI

Nagata Makoto, Sasaki Yuta, Ichikawa Kouji, 2012 .

Modeling of power supply noise on CMOS digital circuits

Nagata Makoto, Matsuno Tetsuro, Fujimoto Daisuke, 2009 .

Countermeasures for power noise and side-channel leakage in crypto fmodules (I)

Nagata Makoto, Miura Noriyuki, Monta Kazuki, 2018 .

An ultra-light weight implementation of PRINCE-family cryptographic processor

Nagata Makoto, Miura Noriyuki, Matsuda Kohei, 2019 .

In-stack diagnosis of power delivery network response in 3D IC

Nagata Makoto, Kikuchi Katsuya, Miura Noriyuki, 2016 .

Evaluation of frequency components of power noise in CMOS digital LSI

Nagata Makoto, Matsumoto Hiroshi, Sasaki Yuta, 2010 .

Evaluation of the influence of high-order harmonic noise from digital circuits on mobile communications

Nagata Makoto, Miura Noriyuki, Tanaka Satoshi, 2017 .

Integrated-Circuit Countermeasures Against Side-Channel Information Leakage

Nagata Makoto, Miura Noriyuki, Fujimoto Daisuke, 2014 .

Measurements and Co-Simulation of On-Chip and On-Boad AC Power Noise in Digital Integrated Circuits

Nagata Makoto, Sasaki Yuta, Ichikawa Kouji, 2011 .

Fine-Grained In-Circuit Continuous-Time Probing Technique of Dynamic Supply Variation in SoCs

Nagata Makoto, Matsuno Tetsuro, Akiyama Rei, 2007 .

A LSI-Package-Board co-evaluation of Power noise in the Digital LSI

Nagata Makoto, Sasaki Yuta, Ichikawa Kouji, 2012 .

Mixed-Signal Simulation Methodology for a Highly Collision-Resistive RFID System

Nagata Makoto, Fukumizu Yohei, Gochi Naoki, 2007 .

An analog security technique on a physical-cyber boundary

Nagata Makoto, Miura Noriyuki, Miki Takuji, 2018 .

Application for Back-End Design of a Highly Collision-Resistive RFID System through High-Level Modeling Approach

Taki Kazuo, Nagata Makoto, Fukumizu Yohei, 2006 .

Immunity Evaluation of SRAM Core Using DPI with On-Chip Diagnosis Structures

Nagata Makoto, Nii Koji, Takata Hidehiro, 2011 .

3D Integration: What and when do we expect?

Nagata Makoto, Takahashi Kenji, Masu Kazuya, 2013 .

Measurement of unnecessary radio wave near the inverter equipment at the carrier frequency-range of cell-phone handset.

Nagata Makoto, Tanaka Satoshi, Yamaguchi Masahiro, 2017 .

Analog circuit operation diagnosis by on-chip multi-channel waveform monitor

Hashida Takushi, Noguchi Koichiro, Nagata Makoto, 2006 .

Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform

Nagata Makoto, Fukazawa Mitsuya, 2007 .

IC Chip Authentication and Guarantee -- As Root Problems of Hardware Security

Nagata Makoto, 2015 .

NoizeProblems in LSI Design:Challenges and Approaches

Nagata Makoto, 2008 .

EMI Performance of Power Delivery Networks in 3D TSV Integration

Nagata Makoto, Kikuchi Katsuya, Miura Noriyuki, 2016 .

Simulation Techniques for EMC Compliant Design of Automotive IC Chips and Modules

Nagata Makoto, Taniguchi Kohki, Fujimoto Daisuke, 2017 .

Low Noise Technology for RFIC Receiver in LTE-Class Cell Phone Handset -- From The Viewpoint of Magnetic Near Field Measurements/Countermeasure

Nagata Makoto, Yamaguchi Masahiro, Endo Yasushi, 2011 .

DAMAGE CONTROLLED PILE FOUNDATION USING SLENDER SUPPORT PILES AND SQUAT EARTHQUAKE-RESISTING PILES

Nagata Makoto, Wada Akira, Yamada Satoshi, 2004 .

Measurements and Analysis of Power Supply Noise in Digital IC Chip

Nagata Makoto, Miura Noriyuki, Tsukioka Akihiro, 2018 .

On-chip monitoring for sub-100-nm digital signal integrity

Noguchi Koichiro, Nagata Makoto, Bando Yoji, 2007 .

Evaluation of power noise in SRAM core

Nagata Makoto, Sawada Takuya, Toshikawa Taku, 2010 .

On-Chip Waveform Capture and Diagnosis of Power Delivery in SoC Integration

Hashida Takushi, Nagata Makoto, Matsumoto Hiroshi, 2010 .

Side-Channel Leakage on Silicon Substrate of CMOS Cryptographic Chip

Nagata Makoto, Miura Noriyuki, Hayashi Yu-ichi, 2014 .