K. A. Asha

Generation of PUF-Keys on FPGAs by K-means Frequency Clustering

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, 2018 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

Performance Analysis and Implementation of Array Multiplier using various Full Adder Designs for DSP Applications: A VLSI Based Approach

K. A. Asha, Kunjan D. Shinde, 2016 .

Analog placement with current flow and symmetry constraints using PCP-SP

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, DAC.

Improving the Quality of FPGA RO-PUF by Principal Component Analysis (PCA)

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2021, ACM J. Emerg. Technol. Comput. Syst..

Analog Placement with Current Flow and Symmetry Constraints using PCP-SP

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).