Abhishek Patyal

Generation of PUF-Keys on FPGAs by K-means Frequency Clustering

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, 2018 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

Late Breaking Results: Pole-aware Analog Placement Considering Monotonic Current Flow and Crossing-Wire Minimization

Hung-Ming Chen, Mark Po-Hung Lin, Abhishek Patyal, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Generation of PUF-Keys on FPGAs by K-means Frequency Clustering

Hung-Ming Chen, Abhishek Patyal, K A Asha, 2018 .

Achieving Analog Layout Integrity through Learning and Migration Invited Talk

Hung-Ming Chen, Mark Po-Hung Lin, Abhishek Patyal, 2020, 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD).

Analog Placement with Current Flow and Symmetry Constraints using PCP-SP

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP

Hung-Ming Chen, Abhishek Patyal, Po-Cheng Pan, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts

Hung-Ming Chen, Abhishek Patyal, Po-Cheng Pan, 2018, 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

Analysis and Design of CMOS Comparator based on gm/Id Approach for CBSC Circuits

Abhishek Patyal, Rishikesh Pandey, 2012 .

Analog placement with current flow and symmetry constraints using PCP-SP

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2018, DAC.

Improving the Quality of FPGA RO-PUF by Principal Component Analysis (PCA)

Hung-Ming Chen, K. A. Asha, Abhishek Patyal, 2021, ACM J. Emerg. Technol. Comput. Syst..