B. Yeung

Evaluation and optimization of package processing and design through solder joint profile prediction

B. Yeung, T.-Y.T. Lee, 2003 .

Encapsulated double-bump WL-CSP: design and reliability

B. Keser, B. Yeung, J. White, 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

Characterization of lead-free solders and under bump metallurgies for flip-chip package

Li Li, Jong-Kai Lin, Yifan Guo, 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).