C. Fenouillet-Béranger

Back-bias impact on variability and BTI for 3D-monolithic 14nm FDSOI SRAMs applications

X. Garros, D. Bosch, G. Cibrario, 2019, 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).

Performance and Reliability of a Fully Integrated 3D Sequential Technology

X. Garros, G. Ghibaudo, P. Batude, 2018, 2018 IEEE Symposium on VLSI Technology.

Novel Fine-Grain Back-Bias Assist Techniques for 14nm FDSOI Top-Tier SRAMs integrated in 3D-Monolithic

X. Garros, D. Bosch, G. Cibrario, 2019, 2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Design technology co-optimization of 3D-monolithic standard cells and SRAM exploiting dynamic back-bias for ultra-low-voltage operation

O. Rozeau, G. Cibrario, P. Batude, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

All-operation-regime characterization and modeling of drain current variability in junctionless and inversion-mode FDSOI transistors

X. Garros, G. Ghibaudo, D. Bosch, 2020, 2020 IEEE Symposium on VLSI Technology.

Ultrathin Body Silicon on Insulator Transistors for 22 nm Node and Beyond

O. Faynot, C. Fenouillet-Béranger, F. Andrieu, 2011 .