Stefan Cosemans

发表

A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications

Francky Catthoor, Wim Dehaene, Vibhu Sharma, 2010, 2010 Proceedings of ESSCIRC.

Cell Variability Impact on the One-Selector One-Resistor Cross-Point Array Performance

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2015, IEEE Transactions on Electron Devices.

Mitigation of Sense Amplifier Degradation Using Skewed Design

Said Hamdioui, Mottaqiallah Taouil, Pieter Weckx, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

One-Selector One-Resistor Cross-Point Array With Threshold Switching Selector

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2015, IEEE Transactions on Electron Devices.

Modeling RRAM SET and RESET statistics with guidelines for optimized operation

Guido Groeseneken, Dirk Wouters, Malgorzata Jurczak, 2013, VLSIT 2013.

Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7

Wim Dehaene, Praveen Raghavan, Pieter Weckx, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).

Selector design considerations and requirements for 1 SIR RRAM crossbar array

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2014, 2014 IEEE 6th International Memory Workshop (IMW).

Comparative BTI analysis for various sense amplifier designs

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2016, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

NEMsCAM: A novel CAM cell based on nano-electro-mechanical switch and CMOS for energy efficient TLBs

Osman S. Unsal, Adrián Cristal, Vasileios Karakostas, 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15).

Mitigation of sense amplifier degradation using input switching

Francky Catthoor, Wim Dehaene, Said Hamdioui, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Comparative BTI impact for SRAM cell and sense amplifier designs

Wim Dehaene, Said Hamdioui, Mottaqiallah Taouil, 2015 .

Litho variations and their impact on the electrical yield of a 32nm node 6TSRAM cell design for manufacturability through design-proces integration II

Geert Vandenberghe, Wim Dehaene, Staf Verhaegen, 2008 .

Leakage current mechanisms and estimation in memories and logic

Wim Dehaene, Praveen Raghavan, Stefan Cosemans, 2011 .

Litho variations and their impact on the electrical yield of a 32nm node 6T SRAM cell

Geert Vandenberghe, Wim Dehaene, Staf Verhaegen, 2008, SPIE Advanced Lithography.

Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2015, 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

A Low Power Embedded SRAM for Wireless Applications

Wim Dehaene, Stefan Cosemans, Francky Catthoor, 2006 .

Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM

Francky Catthoor, Wim Dehaene, Vibhu Sharma, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Analysis of vertical cross-point resistive memory (VRRAM) for 3D RRAM design

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2013, 2013 5th IEEE International Memory Workshop.

Variability-Aware Design of Low Power SRAM Memories (Variabiliteitsbewust ontwerp van SRAM geheugens met een zeer laag energieverbruik)

Stefan Cosemans, Stefan Cosemans, Stefan Cosemans, 2009 .

Dedicated technology threshold voltage tuning for 6T SRAM beyond N7

Wim Dehaene, Praveen Raghavan, Pieter Weckx, 2017, 2017 IEEE International Conference on IC Design and Technology (ICICDT).

A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh

Wim Dehaene, Stefan Cosemans, Anselme Vignon, 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link

Wim Dehaene, Stefan Cosemans, Bram Rooseleer, 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability

Francky Catthoor, Wim Dehaene, Said Hamdioui, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy

Francky Catthoor, Wim Dehaene, Vibhu Sharma, 2011, IEEE Journal of Solid-State Circuits.

FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference pdf

Diederik Verkest, Peter Debacker, Stefan Cosemans, 2019, ArXiv.

Analysis of the effect of cell parameters on the maximum RRAM array size considering both read and write

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2012, 2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC).

Impact and mitigation of SRAM read path aging

Francky Catthoor, Wim Dehaene, Said Hamdioui, 2018, Microelectron. Reliab..

8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes

Francky Catthoor, Wim Dehaene, Vibhu Sharma, 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

Methodology for Application-Dependent Degradation Analysis of Memory Timing

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

BTI analysis of SRAM write driver

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2015, 2015 10th International Design & Test Symposium (IDT).

Hardware-Based Aging Mitigation Scheme for Memory Address Decoder

Said Hamdioui, Mottaqiallah Taouil, Francky Catthoor, 2019, 2019 IEEE European Test Symposium (ETS).

Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A low leakage 500 MHz 2T embedded dynamic memory with integrated semi-transparent refresh

Wim Dehaene, Karen Maex, Stefan Cosemans, 2012 .

Benchmar king On-chip Optical Against Electr ical Inter connect for High- Per for mance Applications

Joris Van Campenhout, Stefan Cosemans, Gerald Beyer, 2011 .

Study of breakdown in STT-MRAM using ramped voltage stress and all-in-one maximum likelihood fit

Dimitri Linten, Philippe Roussel, Robin Degraeve, 2018, 2018 48th European Solid-State Device Research Conference (ESSDERC).

Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors

Francky Catthoor, Wim Dehaene, Vibhu Sharma, 2012, IEEE Micro.

Sense amplifier offset voltage analysis for both time-zero and time-dependent variability

Wim Dehaene, Said Hamdioui, Mottaqiallah Taouil, 2019 .

An Energy-Efficient Design Paradigm for a Memory Cell Based on Novel Nanoelectromechanical Switches

Vasileios Karakostas, Stefan Cosemans, Osman Unsal, 2017 .

Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications

Rudy Lauwereins, Wim Dehaene, Philippe Roussel, 2018, 2018 48th European Solid-State Device Research Conference (ESSDERC).

Benchmarking on-chip optical against electrical interconnect for high-performance applications

Joris Van Campenhout, Stefan Cosemans, Zsolt Tokei, 2011, 2011 IEEE International Interconnect Technology Conference.

Read path degradation analysis in SRAM

Francky Catthoor, Wim Dehaene, Said Hamdioui, 2016, 2016 21th IEEE European Test Symposium (ETS).

Degradation analysis of high performance 14nm FinFET SRAM

Francky Catthoor, Said Hamdioui, Mottaqiallah Taouil, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, Ultra Low Leakage Power Memory Using Dynamic Cell Stability and a Dual Swing Data Link

Wim Dehaene, Stefan Cosemans, Bram Rooseleer, 2012, IEEE Journal of Solid-State Circuits.

Leakage control in SoCs

Wim Dehaene, Praveen Raghavan, Stefan Cosemans, 2011 .

STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance

Liesbet Van der Perre, Diederik Verkest, Wim Dehaene, 2015, 2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA).

Modular sub-wavelength diffractive light modulator for high-definition holographic displays

Gauthier Lafruit, Geert Van der Plas, Xavier Rottenberg, 2013 .

eSRAM Reliability: Why is it still not optimally solved?

Said Hamdioui, Mottaqiallah Taouil, Pieter Weckx, 2020, 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.

Paul Marchal, Wim Dehaene, Stefan Cosemans, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing

Diederik Verkest, Peter Debacker, Stefan Cosemans, 2021, 2021 19th IEEE International New Circuits and Systems Conference (NEWCAS).

Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution

Nico Jossart, Stefan Cosemans, Davide Crotti, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators

Shanshi Huang, Shimeng Yu, Francky Catthoor, 2022, IEEE Design & Test.

A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration

Diederik Verkest, Peter Debacker, Stefan Cosemans, 2021, 2021 IEEE Custom Integrated Circuits Conference (CICC).

Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration

Diederik Verkest, Peter Debacker, Debjyoti Bhattacharjee, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

On-chip optical interconnects versus electrical interconnects for high-performance applications

Joris Van Campenhout, Stefan Cosemans, Gerald Beyer, 2013 .

The VO2 interface, the metal-insulator transition tunnel junction, and the metal-insulator transition switch On-Off resistance

Iuliana Radu, Malgorzata Jurczak, Hugo Bender, 2012 .

High-drive current (>1MA/cm2) and highly nonlinear (>103) TiN/amorphous-Silicon/TiN scalable bidirectional selector with excellent reliability and its variability impact on the 1S1R array performance

Guido Groeseneken, Christoph Adelmann, Malgorzata Jurczak, 2014, 2014 IEEE International Electron Devices Meeting.

On the Optimal ON/OFF Resistance Ratio for Resistive Switching Element in One-Selector One-Resistor Crosspoint Arrays

Guido Groeseneken, Malgorzata Jurczak, Stefan Cosemans, 2015, IEEE Electron Device Letters.

Submicron three-terminal SiGe-based electromechanical ohmic relay

Jeroen De Coster, Xavier Rottenberg, Stefan Cosemans, 2014, 2014 IEEE 27th International Conference on Micro Electro Mechanical Systems (MEMS).