Takashi Ohsawa

发表

Lighting device for vehicle light source

Takashi Ohsawa, Naohito Sato, 2009 .

FBC (Floating Body Cell) for embedded DRAM on SOI

Hiroaki Yamada, Takashi Ohsawa, Hidemi Ishiuchi, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Autonomous Refresh of Floating-Body Cell due to Current Anomaly of Impact Ionization

Akihiro Nitayama, Ryo Fukuda, Takashi Ohsawa, 2009, IEEE Transactions on Electron Devices.

Array Design of High-Density Emerging Memories Making Clamped Bit-Line Sense Amplifier Compatible with Dummy Cell Average Read Scheme

Takashi Ohsawa, Ziyue Zhang, 2020, IEICE Trans. Electron..

Highly scalable FBC (Floating Body Cell) with 25nm BOX structure for embedded DRAM applications

Akihiro Nitayama, Takashi Ohsawa, Takeshi Hamamoto, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

A 250 mV Bit-Line Swing Scheme for 1-V Operating Gigabit Scale DRAMs (Special Issue on Low-Power LSI Technologies)

Tohru Ozaki, Yukihito Oowaki, Shigeyoshi Watanabe, 1996 .

A memory using one-transistor gain cell on SOI(FBC) with performance suitable for embedded DRAM's

Hiroaki Yamada, Takashi Ohsawa, Takeshi Hamamoto, 2003, 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408).

A Power-gated 32bit MPU with a Power Controller Circuit Activated by Deep-sleep-mode Instruction Achieving Ultra-low Power Operation

Tetsuo Endoh, Takahiro Hanyu, H. Ohno, 2014 .

Co-Design of Binary Processing in Memory ReRAM Array and DNN Model Optimization Algorithm

Takashi Ohsawa, Yue Guan, 2020, IEICE Trans. Electron..

A Floating Body Cell (FBC) fully Compatible with 90nm CMOS Technology Node for Embedded Applications

Atsushi Sakamoto, Akihiro Nitayama, Takashi Ohsawa, 2006, 2006 IEEE International Conference on IC Design and Technology.

Spotlight LED lighting device and vehicle headlamp lighting system

Takashi Ohsawa, Yu Inoue, 2009 .

An experimental 4Mb CMOS DRAM

T. Furuyama, T. Tanaka, Takashi Ohsawa, 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

LED illumination device and this used vehicle light illumination device

Takashi Ohsawa, Norikazu Tateishi, 2006 .

FBC'sPotential of6F2Single CellOperation inMulti-Gbit Memories Confirmed byaNewlyDeveloped MethodforMeasuring Signal SenseMargin

Akihiro Nitayama, Takashi Ohsawa, Takeshi Hamamoto, 2007 .

Autonomous refresh of floating body cell (FBC)

Akihiro Nitayama, Ryo Fukuda, Takashi Ohsawa, 2008, 2008 IEEE International Electron Devices Meeting.

Compact Model of Magnetic Tunnel Junctions for SPICE Simulation Based on Switching Probability

Takashi Ohsawa, Haoyan Liu, 2020 .

FBC's Potential of 6F2 Single Cell Operation in Multi-Gbit Memories Confirmed by a Newly Developed Method for Measuring Signal Sense Margin

Akihiro Nitayama, Ryo Fukuda, Takashi Ohsawa, 2007, 2007 IEEE International Electron Devices Meeting.

A 128Mb Floating Body RAM(FBRAM) on SOI with Multi-Averaging Scheme of Dummy Cell

Atsushi Sakamoto, Takashi Ohsawa, Takeshi Hamamoto, 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

A New On-Chip Voltage Converter for Submicron High-Density DRAMs

Tohru Furuyama, Takashi Ohsawa, Shigeyoshi Watanabe, 1986, ESSCIRC '86: Twelfth European Solid-State Circuits Conference.

A Floating-Body Cell Fully Compatible With 90-nm CMOS Technology Node for a 128-Mb SOI DRAM and Its Scalability

Atsushi Sakamoto, Akihiro Nitayama, Takashi Ohsawa, 2007, IEEE Transactions on Electron Devices.

An 18.5ns 128MB SOI DRAM with a floating body cell

Takashi Ohsawa, Shigeyoshi Watanabe, Takeshi Hamamoto, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

A Floating BodyCell(FBC)fully Compatible with90nmCMOS Technology NodeforEmbeddedApplications

Atsushi Sakamoto, Takashi Ohsawa, Hiroyoshi Tanimoto, 2006 .

A 60-ns 4-Mbit CMOS DRAM with built-in selftest function

Kenji Natori, T. Furuyama, Takashi Ohsawa, 1987 .

A floating body cell (FBC) fully compatible with 90nm CMOS technology(CMOS IV) for 128Mb SOI DRAM

Atsushi Sakamoto, Akihiro Nitayama, Takashi Ohsawa, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

On-Chip Supply Voltage Conversion System and Its Application to a 4Mb DRAM

Tohru Furuyama, Shigeyoshi Watanabe, Kazunori Ohuchi, 1986 .

High-density and low-power nonvolatile static random access memory using spin-transfer-torque magnetic tunnel junction

Shoji Ikeda, Tetsuo Endoh, Takahiro Hanyu, 2012 .

Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation

Akihiro Nitayama, Ryo Fukuda, Takashi Ohsawa, 2008, 2008 IEEE International SOI Conference.

Floating Body Cell

Shigeyoshi Watanabe, Takashi Ohsawa, K. Inoh, 2005 .

Fully-depleted FBC (floating body cell) with enlarged signal window and excellent logic process compatibility

Akihiro Nitayama, Takashi Ohsawa, K. Inoh, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Trend of tunnel magnetoresistance and variation in threshold voltage for keeping data load robustness of metal–oxide–semiconductor/magnetic tunnel junction hybrid latches

Tetsuo Endoh, Takahiro Hanyu, Takashi Ohsawa, 2014 .

Operation voltage dependence of memory cell characteristics in fully depleted floating-body cell

Akihiro Nitayama, Takashi Ohsawa, K. Inoh, 2005, IEEE Transactions on Electron Devices.

Studies on Static Noise Margin and Scalability for Low-Power and High-Density Nonvolatile SRAM using Spin-Transfer-Torque (STT) MTJs

Tetsuo Endoh, Takahiro Hanyu, F. Iga, 2011 .