Gessyca Maria Tovar

Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning

Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya, 2007, 2007 International Joint Conference on Neural Networks.

Array-Enhanced Stochastic Resonance in a Network of Noisy Neuromorphic Circuits

Tetsuya Asai, Yoshihito Amemiya, Gessyca Maria Tovar, 2010, ICONIP.

Critical temperature sensor based on oscillatory neuron models (Special issue on nonlinear circuits and signal processing)

Tetsuya Asai, Tetsuya Hirose, Gessyca Maria Tovar, 2008 .

Precisely-timed synchronization among spiking neural circuits on analog VLSIs

Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya, 2006 .

Neuromorphic MOS Circuits Implementing a Temporal Coding Neural Model

Tetsuya Asai, Tetsuya Hirose, Daichi Fujita, 2008 .

Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning

Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya, 2007, ICONIP.

Neuromorphic MOS Circuits Exhibiting Precisely Timed Synchronization with Silicon Spiking Neurons and Depressing Synapses (Special Issue on Nonlinear Circuits and Signal Processing)

Tetsuya Asai, Tetsuya Hirose, Gessyca Maria Tovar, 2006 .

Analog MOS circuits implementing a temporal coding neural model (Special issue on nonlinear circuits and signal processing)

Tetsuya Asai, Daichi Fujita, Gessyca Maria Tovar, 2008 .

Noise-Tolerant Analog Circuits for Sensory Segmentation Based on Symmetric STDP Learning

Tetsuya Asai, Yoshihito Amemiya, Gessyca Maria Tovar, 2008, ICONIP.