Eric Shun Fukuda

Neuromorphic CMOS Circuits implementing a Novel Neural Segmentation Model based on Symmetric STDP Learning

Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya, 2007, 2007 International Joint Conference on Neural Networks.

A Study of Transparent On-chip Instruction Cache for NV Microcontrollers

Tetsuya Asai, Eric Shun Fukuda, Itaru Hida, 2014 .

Caching memcached at reconfigurable network interface

Tetsuya Asai, Takashi Takenaka, Hiroaki Inoue, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Achieving higher performance of memcached by caching at network interface

Tetsuya Asai, Takashi Takenaka, Hiroaki Inoue, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

Reducing Power and Energy Consumption of Nonvolatile Microcontrollers with Transparent On-Chip Instruction Cache

Tetsuya Asai, Masato Motomura, Eric Shun Fukuda, 2014 .

D-23-1 Dynamic Load Generator for Memcached

Tetsuya Asai, Masato Motomura, Eric Shun Fukuda, 2014 .

Eliminating Hardware Development Difficulties for Software Developers

Tetsuya Asai, Takashi Takenaka, Hideyuki Kawashima, 2013 .

Enhancing Memcached by Caching Its Data and Functionalities at Network Interface

Tetsuya Asai, Takashi Takenaka, Hiroaki Inoue, 2015, J. Inf. Process..

Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning

Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya, 2007, ICONIP.

C-Based Adaptive Stream Processing on Dynamically Reconfigurable Hardware: A Case Study on Window Join

Tetsuya Asai, Hideyuki Kawashima, Hiroaki Inoue, 2013, ARC.

Exploiting hardware reconfigurability on window join

Tetsuya Asai, Hideyuki Kawashima, Hiroaki Inoue, 2013, 2013 International Conference on High Performance Computing & Simulation (HPCS).