Hong-June Park

发表

A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC

Minseob Lee, Shinwoong Kim, Hwasuk Cho, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

Fully On-Chip Current Controlled Open-Drain Output Driver for High-Bandwidth DRAMs

Jin-Hyeok Choi, Hong-June Park, Jae-Kyung Wee, 1999 .

Low-Power Small-Area Inverter-Based DSM for MEMS Microphone

Hong-June Park, Jae-Yoon Sim, Seong-Eun Cho, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Signal Peak Detection Circuit for High Speed Serial Interface

Hong-June Park, Jae-Yoon Sim, Jong-Hoon Kim, 2010 .

A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC

Hong-June Park, Jae-Yoon Sim, Yunjae Suh, 2016, J. Circuits Syst. Comput..

A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2016, IEEE Journal of Solid-State Circuits.

A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

Extraction of SPICE Parameters for Through-Hole Via Using a Regular VNA Measurement on Via-TL-Via Structure for Use in DRAM DIMM Modeling

Hong-June Park, Hyun-Bae Lee, Ji-Eun Chae, 2004 .

A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation

Hwasuk Cho, Hong-June Park, Jae-Yoon Sim, 2019, IEEE Transactions on Biomedical Circuits and Systems.

A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects

Hong-June Park, Jae-Yoon Sim, Kyunghyun Lim, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 1.35Gbps decision feedback equalizing receiver for the SSTL SDRAM interface with 2X oversampling phase detector for skew compensation between clock and data

Hong-June Park, Seung-Jun Bae, Young-Soo Sohn, 2002, Proceedings of the 28th European Solid-State Circuits Conference.

Empirical equations for electrical parameters of coupled microstrip lines with one side exposed to air

Hong-June Park, Soo-In Cho, Young-Soo Sohn, 1999 .

A 192-pW Voltage Reference Generating Bandgap– $V_{\text{th}}$ With Process and Temperature Dependence Compensation

Hong-June Park, Jae-Yoon Sim, Jungho Lee, 2019, IEEE Journal of Solid-State Circuits.

GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design

Hong-June Park, Seungho Han, Byungsub Kim, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

A 16.6-pJ/b 150-Mb/s body channel communication transceiver with decision feedback equalization improving >200% area efficiency

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2017, VLSIC 2017.

Low Power Static RAM Design for Data Retention

Hong-June Park, Jin-Yong Chung, Byungok Choi, 2006 .

An Ultrasonic Scanner to Probe 3-D Finger Skin Structures for Biometric Recognition

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2019 .

A voltage-scalable 10-b pipelined ADC with current-mode amplifier

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2014, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference.

A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control

Jahyun Koo, Byungsub Kim, Hong-June Park, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 0.12GHz-1.4GHz DLL-based clock generator with a multiplied 4-phase clock using a 0.18um CMOS process

Hong-June Park, Jae-Yoon Sim, Jae-Seung Lee, 2006 .

A Temperature- and Supply-Insensitive Fully On-Chip 1 Gb/s CMOS Open-Drain Output Driver for High-Bandwidth DRAMs

Hong-June Park, Jae-Kyung Wee, Jong-Doo Joo, 2002 .

An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss

Hong-June Park, Jae-Yoon Sim, Jongshin Shin, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

All-CMOS temperature independent current reference

C.-H. Lee, Hong-June Park, C. Lee, 1996 .

Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement

Hong-June Park, Jae-Yoon Sim, Seungho Han, 2015 .

840 Mb/s CMOS demultiplexed equalizing transceiver for DRAM-to-processer communication

Hong-June Park, Jae-Yoon Sim, Soo-In Cho, 1999 .

Two-Phase Boosted Voltage Generator for Low-Voltage Giga-Bit DRAMs

Hong-June Park, Joo-Sun Choi, Seung-Han Ahn, 2000 .

A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s

Byungsub Kim, Hong-June Park, Jae-Yoon Sim, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

Fully Differential ROIC for SNR Enhancement by using a MEMS Microphone Pair with a Differential AC Bias and a High-voltage DC Bias

Hong-June Park, Jae-Yoon Sim, Yoon-Jee Kim, 2020 .

SIMULTANEOUS SWITCHING NOISE ANALYSIS OF A 16 MB × 9 DRAM SIMM MEMORY MODULE

Hong-June Park, Oh-Hyun Kim, Si-Don Choi, 1995 .

CMOS sense-amplifier type flip-flop having improved setup/hold margin

Hong-June Park, Seong-Ik Cho, Young-Hee Kim, 2003 .