Seojin Choi

发表

An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier With a Multiplication Factor of 114

Jaehyouk Choi, Younghyun Lim, Yongsun Lee, 2019, IEEE Journal of Solid-State Circuits.

Platform Technology for Development of Personalized Functional Foods (1)

So Young Park, Seojin Choi, Dae-Young Kwon, 2015 .

A PVT-Robust and Low-Jitter Ring-VCO-Based Injection-Locked Clock Multiplier With a Continuous Frequency-Tracking Loop Using a Replica-Delay Cell and a Dual-Edge Phase Detector

Jaehyouk Choi, Younghyun Lim, Seojin Choi, 2016, IEEE Journal of Solid-State Circuits.

A Low-Integrated-Phase-Noise 27–30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers

Jaehyouk Choi, Juyeop Kim, Heein Yoon, 2018, IEEE Journal of Solid-State Circuits.

30.9 A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator

Jaehyouk Choi, Younghyun Lim, Yongsun Lee, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier

Jaehyouk Choi, Younghyun Lim, Yongsun Lee, 2018, 2018 IEEE Symposium on VLSI Circuits.

Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers

Jaehyouk Choi, Juyeop Kim, Heein Yoon, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

10.7 A 185fsrms-integrated-jitter and −245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector

Jaehyouk Choi, Seojin Choi, Seyeon Yoo, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

19.2 A PVT-robust −39dBc 1kHz-to-100MHz integrated-phase-noise 29GHz injection-locked frequency multiplier with a 600µW frequency-tracking loop using the averages of phase deviations for mm-band 5G transceivers

Jaehyouk Choi, Juyeop Kim, Heein Yoon, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells

Jaehyouk Choi, Mina Kim, Seojin Choi, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-Time PVT Calibrator With Replica-Delay Cells

Jaehyouk Choi, Taeho Seong, Seojin Choi, 2016, IEEE Journal of Solid-State Circuits.

A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator

Jaehyouk Choi, Younghyun Lim, Yongsun Lee, 2021, IEEE Journal of Solid-State Circuits.

32.4 A 104fsrms-Jitter and -61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique

Jaehyouk Choi, Younghyun Lim, Yongsun Lee, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier- Based Phase Detector in 65nm CMOS

Jaehyouk Choi, Heein Yoon, Yoonseo Cho, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Linearly frequency-tunable and low-phase noise ring VCO using varactors with optimally-spaced bias voltages

Jaehyouk Choi, Young-Kyun Cho, Seojin Choi, 2018 .