Paul G. Villarrubia

发表

Robust partitioning for hardware-accelerated functional verification

Mátyás A. Sustik, Michael D. Moffitt, Paul G. Villarrubia, 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

Diffusion-based placement migration

David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, 2005, Proceedings. 42nd Design Automation Conference, 2005..

Techniques for Fast Physical Synthesis Fast, efficient buffer design, logic transformations, and clustering components for placement are some of the techniques being used to reduce design turnaround for large, complex chips.

Member Ieee, Charles J. Alpert, Zhuo Li, 2007 .

Benchmarking for large-scale placement and beyond

Igor L. Markov, Patrick H. Madden, Paul G. Villarrubia, 2004, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Physical design tools for hierarchy

Paul G. Villarrubia, 2005, ISPD '05.

The coming of age of physical synthesis

Charles J. Alpert, Paul G. Villarrubia, Chris Chu, 2007, ICCAD 2007.

ISPD 2005/2006 Placement Benchmarks

Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia, 2007, Modern Circuit Placement.

The coming of age of physical synthesis

Chris C. N. Chu, Charles J. Alpert, Paul G. Villarrubia, 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

Improving Min-cut Placement for VLSI Using Analytical Techniques

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2003 .

Free space management for cut-based placement [IC layout]

Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

The Effect of Free Space in Global Placement

Charles J. Alpert, Paul G. Villarrubia, Gi Jung Nam, 2002, International Conference on Computer Aided Design.

On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2003, ICCAD 2003.

A semi-persistent clustering technique for VLSI circuit placement

Andrew B. Kahng, Gi-Joon Nam, Charles J. Alpert, 2005, ISPD '05.

On whitespace and stability in mixed-size placement and physical synthesis

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2003, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486).

Hippocrates: First-Do-No-Harm Detailed Placement

David Z. Pan, Gi-Joon Nam, Charles J. Alpert, 2007, 2007 Asia and South Pacific Design Automation Conference.

Challenges at 45nm and beyond

Puneet Gupta, Sang H. Dhong, Eric Soenen, 2008, ICCAD.

Challenges at 45nm and beyond

Paul G. Villarrubia, Dan Bailey, Sang Hoo Dhong, 2008, ICCAD 2008.

Effective free space management for cut-based placement via analytical constraint generation

Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

RQL: Global Placement via Relaxed Quadratic Spreading and Linearization

Chris C. N. Chu, Natarajan Viswanathan, Gi-Joon Nam, 2007, 2007 44th ACM/IEEE Design Automation Conference.

A fast hierarchical quadratic placement algorithm

Andrew B. Kahng, Gi-Joon Nam, Charles J. Alpert, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Placement: introduction/Problem Formulation

Paul G. Villarrubia, Gi-Joon Nam, 2008 .

Important placement considerations for modern VLSI chips

Paul G. Villarrubia, 2003, ISPD '03.

Diffusion-Based Placement Migration With Application on Legalization

David Z. Pan, Gi-Joon Nam, Charles J. Alpert, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Benchmarking for large-scale placement and beyond

Igor L. Markov, Patrick H. Madden, Paul G. Villarrubia, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An integrated placement and synthesis approach for timing closure of PowerPC/sup TM/ microprocessors

Paul G. Villarrubia, Shervin Hojat, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

True crosstalk aware incremental placement with noise map

David Z. Pan, Paul G. Villarrubia, Haoxing Ren, 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

International Symposium on Physical Design (ISPD)

Andrew B. Kahng, Sachin S. Sapatnekar, Jiang Hu, 2002, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A practical methodology for early buffer and wire resource allocation

Sachin S. Sapatnekar, Jiang Hu, Charles J. Alpert, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Fast Electrical Correction Using Resizing and Buffering

Charles J. Alpert, Paul G. Villarrubia, Stephen T. Quay, 2007, 2007 Asia and South Pacific Design Automation Conference.

"Timing closure by design," a high frequency microprocessor design methodology

Kevin J. Nowka, Sang H. Dhong, H. Peter Hofstee, 2000, Proceedings 37th Design Automation Conference.

Techniques for Fast Physical Synthesis

Gi-Joon Nam, Charles J. Alpert, Zhuo Li, 2007, Proceedings of the IEEE.

On whitespace and stability in physical synthesis

Igor L. Markov, Paul G. Villarrubia, Saurabh N. Adya, 2006, Integr..

Free space management for cut-based placement

Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam, 2002, ICCAD 2002.

Fast interconnect synthesis with layer assignment

Shiyan Hu, Charles J. Alpert, Zhuo Li, 2008, ISPD '08.

Transformational placement and synthesis

Leon Stok, Prabhakar Kudva, Kanad Chakraborty, 2000, DATE '00.

The nuts and bolts of physical synthesis

Gi-Joon Nam, Charles J. Alpert, Zhuo Li, 2007, SLIP '07.

The ISPD2005 placement contest and benchmark suite

Gi-Joon Nam, Charles J. Alpert, Bruce Winter, 2005, ISPD '05.

A practical methodology for early buffer and wire resource allocation

Sachin S. Sapatnekar, Jiang Hu, Charles J. Alpert, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..