Miguel Arias-Estrada

发表

The Use of Dedicated Processors to Accelerate the Identification of Novel Antibacterial Peptides

Gabriel del Rio, Miguel Arias-Estrada, Carlos Polanco González, 2015 .

Customizable FPGA-based architecture for video applications in real time

Griselda Saldaña-González, Miguel Arias-Estrada, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Depth from a Motion Algorithm and a Hardware Architecture for Smart Cameras

Miguel Arias-Estrada, Abiel Aguilar-González, François Berry, 2019, Sensors.

FPGA-based architecture for motion recovering in real-time

Miguel Arias-Estrada, Selene E. Maya-Rueda, Cesar Torres-Huitzil, 2002, IS&T/SPIE Electronic Imaging.

COMPACT FPGA-BASEDSYSTOLICARRAY ARCHITECTUREFOR MOTION ESTIMATIONUSINGFULLSEARCHBLOCK MATCHING

Miguel Arias-Estrada, Griselda SaldahaI, 2007 .

Ranking Corner Points by the Angular Difference between Dominant Edges

Miguel Arias-Estrada, Rafael Lemuz-López, M. Arias-Estrada, 2008, ICVS.

Reconfigurable vision system for real-time applications

Miguel Arias-Estrada, Cesar Torres-Huitzil, 2002, IS&T/SPIE Electronic Imaging.

ファジィ論理に基づくFPGAステレオマッチング装置【Powered by NICT】

Miguel Arias-Estrada, M. Pérez-Patricio, Aguilar-Gonzalez Abiel, 2016 .

A Low-Level Image Processing Algorithms Accelerator Platform

Griselda Saldaña-González, Miguel Arias-Estrada, 2008, 18th International Conference on Electronics, Communications and Computers (conielecomp 2008).

Compact FPGA-based systolic array architecture suitable for vision systems

Griselda Saldaña-González, Miguel Arias-Estrada, 2007, Int. J. High Perform. Syst. Archit..

Real-time FPGA-based architecture for stereo vision

Miguel Arias-Estrada, Juan M. Xicotencatl, 2001, IS&T/SPIE Electronic Imaging.

A population coding hardware architecture for Spiking Neural Networks applications

Bernard Girau, Miguel Arias-Estrada, Marco Nuno-Maganda, 2009, 2009 5th Southern Conference on Programmable Logic (SPL).

FPGA-based customizable systolic architecture for image processing applications

Griselda Saldaña-González, Miguel Arias-Estrada, 2005, 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05).

Using an aliasing operator and a single discrete Fourier transform to down-sample the Fresnel transform.

Miguel Arias-Estrada, Albertina Castro, Modesto Medina-Melendrez, 2012, Optics express.

A Domain Reduction Algorithm for Incremental Projective Reconstruction

Miguel Arias-Estrada, Rafael Lemuz-López, M. Arias-Estrada, 2006, ISVC.

Dense Feature Matching Core for FPGA-based Smart Cameras

Miguel Arias-Estrada, Abiel Aguilar-González, François Berry, 2017, ICDSC.

Remote hardware-reconfigurable robotic camera

Miguel Arias-Estrada, Selene E. Maya-Rueda, Cesar Torres-Huitzil, 2001, SPIE Optics East.

The fastest visual ego-motion algorithm in the west

Miguel Arias-Estrada, Abiel Aguilar-González, François Berry, 2019, Microprocess. Microsystems.

Motion camera based on a custom vision sensor and an FPGA architecture

Miguel Arias-Estrada, 1998, Other Conferences.

Real Time FPGA-based Architecture for Video Applications

Griselda Saldaña-González, Miguel Arias-Estrada, 2006, 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006).

PhD Forum: Camera Pose Estimation Suitable for Smart Cameras

Miguel Arias-Estrada, Abiel Aguilar-González, François Berry, 2017 .

Electronic Devices That Identify Individuals with Fever in Crowded Places: A Prototype

Miguel Arias-Estrada, Thomas Buhse, Carlos Polanco González, 2017, Micromachines.

Compact FPGA-based systolic array architecture suitable for vision systems

Griselda Saldaña-González, Miguel Arias-Estrada, 2007, Fourth International Conference on Information Technology (ITNG'07).

Deep Learning Pulsed-based Convolutional Neuroprocessor Architecture on FPGAs

Miguel Arias-Estrada, Walther Carballo-Hernández, 2017, ICDSC.

HIGHPERFORMANCE HARDWARE IMPLEMENTATIONOFSPIKEPROPLEARNING: POTENTIALAND TRADEOFFS

Miguel Arias-Estrada, MarcoAurelio Nuno-Maganda, StaMaria Tonantzintla, 2007 .

Multiple Stereo Matching Using an Extended Architecture

Miguel Arias-Estrada, Juan M. Xicotencatl, 2001, FPL.

Embedded attitude control system for the educative satellite SATEDU

Miguel Arias-Estrada, Ignacio Mendoza Nucamendi, Esaú Vicente Vivas, 2012, CONIELECOMP 2012, 22nd International Conference on Electrical Communications and Computers.

Submillimeter bolt location in car bodywork for production line quality inspection

Miguel Arias-Estrada, Aurelio Lopez-Lopez, Leopoldo Altamirano-Robles, 2000, Electronic Imaging.

FPGA Based Acceleration for Image Processing Applications

Griselda Saldaña-González, Miguel Arias-Estrada, 2009 .

Robust feature extraction algorithm suitable for real-time embedded applications

Miguel Arias-Estrada, Abiel Aguilar-González, François Berry, 2017, Journal of Real-Time Image Processing.

Proceedings Sixth Mexican Intertianal Conference on Computer Science ENC 2005: Foreword

Miguel Arias-Estrada, Jesus Favela Vara, 2005 .

Bragg curve identification using a neural network

Leopoldo Altamirano Robles, Miguel Arias-Estrada, J. J. Vega, 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks. IJCNN 2000. Neural Computing: New Challenges and Perspectives for the New Millennium.

Computer vision camera with embedded FPGA processing

Miguel Arias-Estrada, Denis Ouellet, Antoine Lecerf, 2000, Electronic Imaging.

A Fuzzy Logic Approach for Stereo Matching Suited for Real-Time Processing

Miguel Arias-Estrada, M. Pérez-Patricio, Abiel Aguilar-González, 2015 .

AN EFFICIENTSCALABLEPARALLELHARDWARE ARCHITECTUREFOR MULTILAYERSPIKINGNEURAL NETWORKS

Miguel Arias-Estrada, MarcoAurelio Nuno-Maganda, 2007 .

Iterative Closest SIFT Formulation for Robust Feature Matching

Miguel Arias-Estrada, Rafael Lemuz-López, M. Arias-Estrada, 2006, ISVC.

GPU-based Visual Odometry for Autonomous Vehicle Applications

Miguel Arias-Estrada, Abiel Aguilar-González, J. A. de Jesús Osuna-Coutiño, 2017, ICDSC.

Super-resolution with integrated radial distortion correction

Miguel Arias-Estrada, Liz Castillo-Jimenez, M. Arias-Estrada, 2005, Sixth Mexican International Conference on Computer Science (ENC'05).